SAM3S4B.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .text 00000380 00400000 00400000 00010000 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .relocate 0000042c 20000000 00400380 00020000 2**3 CONTENTS, ALLOC, LOAD, DATA 2 .bss 00000040 2000042c 004007ac 0002042c 2**2 ALLOC 3 .stack 00002004 2000046c 004007ec 0002042c 2**0 ALLOC 4 .ARM.attributes 00000029 00000000 00000000 0002042c 2**0 CONTENTS, READONLY 5 .comment 00000059 00000000 00000000 00020455 2**0 CONTENTS, READONLY 6 .debug_info 00002be7 00000000 00000000 000204ae 2**0 CONTENTS, READONLY, DEBUGGING 7 .debug_abbrev 000006ff 00000000 00000000 00023095 2**0 CONTENTS, READONLY, DEBUGGING 8 .debug_aranges 00000080 00000000 00000000 00023794 2**0 CONTENTS, READONLY, DEBUGGING 9 .debug_ranges 00000040 00000000 00000000 00023814 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_macro 0000ed6d 00000000 00000000 00023854 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_line 00002a81 00000000 00000000 000325c1 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_str 0004851d 00000000 00000000 00035042 2**0 CONTENTS, READONLY, DEBUGGING 13 .debug_frame 00000250 00000000 00000000 0007d560 2**2 CONTENTS, READONLY, DEBUGGING 14 .debug_loc 0000008b 00000000 00000000 0007d7b0 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 00400000 : 400000: 70 24 00 20 41 01 40 00 3f 01 40 00 3f 01 40 00 p$. A.@.?.@.?.@. 400010: 3f 01 40 00 3f 01 40 00 3f 01 40 00 00 00 00 00 ?.@.?.@.?.@..... ... 40002c: 3f 01 40 00 3f 01 40 00 00 00 00 00 3f 01 40 00 ?.@.?.@.....?.@. 40003c: 3f 01 40 00 3f 01 40 00 3f 01 40 00 3f 01 40 00 ?.@.?.@.?.@.?.@. 40004c: 3f 01 40 00 3f 01 40 00 3f 01 40 00 3f 01 40 00 ?.@.?.@.?.@.?.@. 40005c: 3f 01 40 00 3f 01 40 00 3f 01 40 00 3f 01 40 00 ?.@.?.@.?.@.?.@. 40006c: 3f 01 40 00 3f 01 40 00 3f 01 40 00 3f 01 40 00 ?.@.?.@.?.@.?.@. 40007c: 3f 01 40 00 3f 01 40 00 3f 01 40 00 3f 01 40 00 ?.@.?.@.?.@.?.@. 40008c: 3f 01 40 00 3f 01 40 00 3f 01 40 00 3f 01 40 00 ?.@.?.@.?.@.?.@. 40009c: 3f 01 40 00 3f 01 40 00 3f 01 40 00 3f 01 40 00 ?.@.?.@.?.@.?.@. 4000ac: 3f 01 40 00 3f 01 40 00 3f 01 40 00 3f 01 40 00 ?.@.?.@.?.@.?.@. 4000bc: 3f 01 40 00 3f 01 40 00 3f 01 40 00 3f 01 40 00 ?.@.?.@.?.@.?.@. 4000cc: 3f 01 40 00 ?.@. 004000d0 <__do_global_dtors_aux>: 4000d0: b510 push {r4, lr} 4000d2: 4c05 ldr r4, [pc, #20] ; (4000e8 <__do_global_dtors_aux+0x18>) 4000d4: 7823 ldrb r3, [r4, #0] 4000d6: b933 cbnz r3, 4000e6 <__do_global_dtors_aux+0x16> 4000d8: 4b04 ldr r3, [pc, #16] ; (4000ec <__do_global_dtors_aux+0x1c>) 4000da: b113 cbz r3, 4000e2 <__do_global_dtors_aux+0x12> 4000dc: 4804 ldr r0, [pc, #16] ; (4000f0 <__do_global_dtors_aux+0x20>) 4000de: f3af 8000 nop.w 4000e2: 2301 movs r3, #1 4000e4: 7023 strb r3, [r4, #0] 4000e6: bd10 pop {r4, pc} 4000e8: 2000042c .word 0x2000042c 4000ec: 00000000 .word 0x00000000 4000f0: 00400380 .word 0x00400380 004000f4 : 4000f4: 4b0c ldr r3, [pc, #48] ; (400128 ) 4000f6: b143 cbz r3, 40010a 4000f8: 480c ldr r0, [pc, #48] ; (40012c ) 4000fa: b510 push {r4, lr} 4000fc: 490c ldr r1, [pc, #48] ; (400130 ) 4000fe: f3af 8000 nop.w 400102: 480c ldr r0, [pc, #48] ; (400134 ) 400104: 6803 ldr r3, [r0, #0] 400106: b923 cbnz r3, 400112 400108: bd10 pop {r4, pc} 40010a: 480a ldr r0, [pc, #40] ; (400134 ) 40010c: 6803 ldr r3, [r0, #0] 40010e: b933 cbnz r3, 40011e 400110: 4770 bx lr 400112: 4b09 ldr r3, [pc, #36] ; (400138 ) 400114: 2b00 cmp r3, #0 400116: d0f7 beq.n 400108 400118: e8bd 4010 ldmia.w sp!, {r4, lr} 40011c: 4718 bx r3 40011e: 4b06 ldr r3, [pc, #24] ; (400138 ) 400120: 2b00 cmp r3, #0 400122: d0f5 beq.n 400110 400124: 4718 bx r3 400126: bf00 nop 400128: 00000000 .word 0x00000000 40012c: 00400380 .word 0x00400380 400130: 20000430 .word 0x20000430 400134: 00400380 .word 0x00400380 400138: 00000000 .word 0x00000000 0040013c : #include #include #include void board_init(void) { 40013c: 4770 bx lr 0040013e : /** * \brief Default interrupt handler for unused IRQs. */ void Dummy_Handler(void) { 40013e: e7fe b.n 40013e 00400140 : /** * \brief This is the code that gets called on processor reset. * To initialize the device, and call the main() routine. */ void Reset_Handler(void) { 400140: b508 push {r3, lr} /* Initialize the relocate segment */ pSrc = &_etext; pDest = &_srelocate; if (pSrc != pDest) { 400142: 4b1c ldr r3, [pc, #112] ; (4001b4 ) 400144: 4a1c ldr r2, [pc, #112] ; (4001b8 ) 400146: 429a cmp r2, r3 400148: d010 beq.n 40016c for (; pDest < &_erelocate;) { 40014a: 4b1c ldr r3, [pc, #112] ; (4001bc ) 40014c: 4a19 ldr r2, [pc, #100] ; (4001b4 ) 40014e: 429a cmp r2, r3 400150: d20c bcs.n 40016c 400152: 3b01 subs r3, #1 400154: 1a9b subs r3, r3, r2 400156: f023 0303 bic.w r3, r3, #3 40015a: 3304 adds r3, #4 40015c: 4413 add r3, r2 40015e: 4916 ldr r1, [pc, #88] ; (4001b8 ) *pDest++ = *pSrc++; 400160: f851 0b04 ldr.w r0, [r1], #4 400164: f842 0b04 str.w r0, [r2], #4 for (; pDest < &_erelocate;) { 400168: 429a cmp r2, r3 40016a: d1f9 bne.n 400160 } } /* Clear the zero segment */ for (pDest = &_szero; pDest < &_ezero;) { 40016c: 4b14 ldr r3, [pc, #80] ; (4001c0 ) 40016e: 4a15 ldr r2, [pc, #84] ; (4001c4 ) 400170: 429a cmp r2, r3 400172: d20a bcs.n 40018a 400174: 3b01 subs r3, #1 400176: 1a9b subs r3, r3, r2 400178: f023 0303 bic.w r3, r3, #3 40017c: 3304 adds r3, #4 40017e: 4413 add r3, r2 *pDest++ = 0; 400180: 2100 movs r1, #0 400182: f842 1b04 str.w r1, [r2], #4 for (pDest = &_szero; pDest < &_ezero;) { 400186: 4293 cmp r3, r2 400188: d1fb bne.n 400182 } /* Set the vector table base address */ pSrc = (uint32_t *) & _sfixed; SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk); 40018a: 4b0f ldr r3, [pc, #60] ; (4001c8 ) 40018c: f023 4260 bic.w r2, r3, #3758096384 ; 0xe0000000 400190: f022 027f bic.w r2, r2, #127 ; 0x7f 400194: 490d ldr r1, [pc, #52] ; (4001cc ) 400196: 608a str r2, [r1, #8] if (((uint32_t) pSrc >= IRAM_ADDR) && ((uint32_t) pSrc < IRAM_ADDR + IRAM_SIZE)) { 400198: f103 4360 add.w r3, r3, #3758096384 ; 0xe0000000 40019c: f5b3 4f40 cmp.w r3, #49152 ; 0xc000 4001a0: d203 bcs.n 4001aa SCB->VTOR |= 1 << SCB_VTOR_TBLBASE_Pos; 4001a2: 688b ldr r3, [r1, #8] 4001a4: f043 5300 orr.w r3, r3, #536870912 ; 0x20000000 4001a8: 608b str r3, [r1, #8] } /* Initialize the C library */ __libc_init_array(); 4001aa: 4b09 ldr r3, [pc, #36] ; (4001d0 ) 4001ac: 4798 blx r3 /* Branch to main function */ main(); 4001ae: 4b09 ldr r3, [pc, #36] ; (4001d4 ) 4001b0: 4798 blx r3 4001b2: e7fe b.n 4001b2 4001b4: 20000000 .word 0x20000000 4001b8: 00400380 .word 0x00400380 4001bc: 2000042c .word 0x2000042c 4001c0: 2000046c .word 0x2000046c 4001c4: 2000042c .word 0x2000042c 4001c8: 00400000 .word 0x00400000 4001cc: e000ed00 .word 0xe000ed00 4001d0: 004001e9 .word 0x004001e9 4001d4: 004001d9 .word 0x004001d9 004001d8
: * Support and FAQ: visit Microchip Support */ #include int main (void) { 4001d8: b508 push {r3, lr} /* Insert system clock initialization code here (sysclk_init()). */ board_init(); 4001da: 4b02 ldr r3, [pc, #8] ; (4001e4 ) 4001dc: 4798 blx r3 /* Insert application code here, after the board has been initialized. */ } 4001de: 2000 movs r0, #0 4001e0: bd08 pop {r3, pc} 4001e2: bf00 nop 4001e4: 0040013d .word 0x0040013d 004001e8 <__libc_init_array>: 4001e8: b570 push {r4, r5, r6, lr} 4001ea: 4e0f ldr r6, [pc, #60] ; (400228 <__libc_init_array+0x40>) 4001ec: 4d0f ldr r5, [pc, #60] ; (40022c <__libc_init_array+0x44>) 4001ee: 1b76 subs r6, r6, r5 4001f0: 10b6 asrs r6, r6, #2 4001f2: bf18 it ne 4001f4: 2400 movne r4, #0 4001f6: d005 beq.n 400204 <__libc_init_array+0x1c> 4001f8: 3401 adds r4, #1 4001fa: f855 3b04 ldr.w r3, [r5], #4 4001fe: 4798 blx r3 400200: 42a6 cmp r6, r4 400202: d1f9 bne.n 4001f8 <__libc_init_array+0x10> 400204: 4e0a ldr r6, [pc, #40] ; (400230 <__libc_init_array+0x48>) 400206: 4d0b ldr r5, [pc, #44] ; (400234 <__libc_init_array+0x4c>) 400208: f000 f8a8 bl 40035c <_init> 40020c: 1b76 subs r6, r6, r5 40020e: 10b6 asrs r6, r6, #2 400210: bf18 it ne 400212: 2400 movne r4, #0 400214: d006 beq.n 400224 <__libc_init_array+0x3c> 400216: 3401 adds r4, #1 400218: f855 3b04 ldr.w r3, [r5], #4 40021c: 4798 blx r3 40021e: 42a6 cmp r6, r4 400220: d1f9 bne.n 400216 <__libc_init_array+0x2e> 400222: bd70 pop {r4, r5, r6, pc} 400224: bd70 pop {r4, r5, r6, pc} 400226: bf00 nop 400228: 00400368 .word 0x00400368 40022c: 00400368 .word 0x00400368 400230: 00400370 .word 0x00400370 400234: 00400368 .word 0x00400368 00400238 : 400238: 4b02 ldr r3, [pc, #8] ; (400244 ) 40023a: b113 cbz r3, 400242 40023c: 4802 ldr r0, [pc, #8] ; (400248 ) 40023e: f000 b805 b.w 40024c 400242: 4770 bx lr 400244: 00000000 .word 0x00000000 400248: 00400259 .word 0x00400259 0040024c : 40024c: 2300 movs r3, #0 40024e: 4601 mov r1, r0 400250: 461a mov r2, r3 400252: 4618 mov r0, r3 400254: f000 b81e b.w 400294 <__register_exitproc> 00400258 <__libc_fini_array>: 400258: b538 push {r3, r4, r5, lr} 40025a: 4c0a ldr r4, [pc, #40] ; (400284 <__libc_fini_array+0x2c>) 40025c: 4d0a ldr r5, [pc, #40] ; (400288 <__libc_fini_array+0x30>) 40025e: 1b64 subs r4, r4, r5 400260: 10a4 asrs r4, r4, #2 400262: d00a beq.n 40027a <__libc_fini_array+0x22> 400264: f104 4380 add.w r3, r4, #1073741824 ; 0x40000000 400268: 3b01 subs r3, #1 40026a: eb05 0583 add.w r5, r5, r3, lsl #2 40026e: 3c01 subs r4, #1 400270: f855 3904 ldr.w r3, [r5], #-4 400274: 4798 blx r3 400276: 2c00 cmp r4, #0 400278: d1f9 bne.n 40026e <__libc_fini_array+0x16> 40027a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 40027e: f000 b877 b.w 400370 <_fini> 400282: bf00 nop 400284: 00400380 .word 0x00400380 400288: 0040037c .word 0x0040037c 0040028c <__retarget_lock_acquire_recursive>: 40028c: 4770 bx lr 40028e: bf00 nop 00400290 <__retarget_lock_release_recursive>: 400290: 4770 bx lr 400292: bf00 nop 00400294 <__register_exitproc>: 400294: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 400298: 4d2c ldr r5, [pc, #176] ; (40034c <__register_exitproc+0xb8>) 40029a: 4606 mov r6, r0 40029c: 6828 ldr r0, [r5, #0] 40029e: 4698 mov r8, r3 4002a0: 460f mov r7, r1 4002a2: 4691 mov r9, r2 4002a4: f7ff fff2 bl 40028c <__retarget_lock_acquire_recursive> 4002a8: 4b29 ldr r3, [pc, #164] ; (400350 <__register_exitproc+0xbc>) 4002aa: 681c ldr r4, [r3, #0] 4002ac: f8d4 3148 ldr.w r3, [r4, #328] ; 0x148 4002b0: 2b00 cmp r3, #0 4002b2: d03e beq.n 400332 <__register_exitproc+0x9e> 4002b4: 685a ldr r2, [r3, #4] 4002b6: 2a1f cmp r2, #31 4002b8: dc1c bgt.n 4002f4 <__register_exitproc+0x60> 4002ba: f102 0e01 add.w lr, r2, #1 4002be: b176 cbz r6, 4002de <__register_exitproc+0x4a> 4002c0: 2101 movs r1, #1 4002c2: eb03 0482 add.w r4, r3, r2, lsl #2 4002c6: f8c4 9088 str.w r9, [r4, #136] ; 0x88 4002ca: f8d3 0188 ldr.w r0, [r3, #392] ; 0x188 4002ce: 4091 lsls r1, r2 4002d0: 4308 orrs r0, r1 4002d2: 2e02 cmp r6, #2 4002d4: f8c3 0188 str.w r0, [r3, #392] ; 0x188 4002d8: f8c4 8108 str.w r8, [r4, #264] ; 0x108 4002dc: d023 beq.n 400326 <__register_exitproc+0x92> 4002de: 3202 adds r2, #2 4002e0: f8c3 e004 str.w lr, [r3, #4] 4002e4: 6828 ldr r0, [r5, #0] 4002e6: f843 7022 str.w r7, [r3, r2, lsl #2] 4002ea: f7ff ffd1 bl 400290 <__retarget_lock_release_recursive> 4002ee: 2000 movs r0, #0 4002f0: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 4002f4: 4b17 ldr r3, [pc, #92] ; (400354 <__register_exitproc+0xc0>) 4002f6: b30b cbz r3, 40033c <__register_exitproc+0xa8> 4002f8: f44f 70c8 mov.w r0, #400 ; 0x190 4002fc: f3af 8000 nop.w 400300: 4603 mov r3, r0 400302: b1d8 cbz r0, 40033c <__register_exitproc+0xa8> 400304: 2000 movs r0, #0 400306: f8d4 1148 ldr.w r1, [r4, #328] ; 0x148 40030a: f04f 0e01 mov.w lr, #1 40030e: 6058 str r0, [r3, #4] 400310: 6019 str r1, [r3, #0] 400312: 4602 mov r2, r0 400314: f8c4 3148 str.w r3, [r4, #328] ; 0x148 400318: f8c3 0188 str.w r0, [r3, #392] ; 0x188 40031c: f8c3 018c str.w r0, [r3, #396] ; 0x18c 400320: 2e00 cmp r6, #0 400322: d0dc beq.n 4002de <__register_exitproc+0x4a> 400324: e7cc b.n 4002c0 <__register_exitproc+0x2c> 400326: f8d3 018c ldr.w r0, [r3, #396] ; 0x18c 40032a: 4301 orrs r1, r0 40032c: f8c3 118c str.w r1, [r3, #396] ; 0x18c 400330: e7d5 b.n 4002de <__register_exitproc+0x4a> 400332: f504 73a6 add.w r3, r4, #332 ; 0x14c 400336: f8c4 3148 str.w r3, [r4, #328] ; 0x148 40033a: e7bb b.n 4002b4 <__register_exitproc+0x20> 40033c: 6828 ldr r0, [r5, #0] 40033e: f7ff ffa7 bl 400290 <__retarget_lock_release_recursive> 400342: f04f 30ff mov.w r0, #4294967295 400346: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 40034a: bf00 nop 40034c: 20000428 .word 0x20000428 400350: 00400358 .word 0x00400358 400354: 00000000 .word 0x00000000 00400358 <_global_impure_ptr>: 400358: 20000000 ... 0040035c <_init>: 40035c: b5f8 push {r3, r4, r5, r6, r7, lr} 40035e: bf00 nop 400360: bcf8 pop {r3, r4, r5, r6, r7} 400362: bc08 pop {r3} 400364: 469e mov lr, r3 400366: 4770 bx lr 00400368 <__init_array_start>: 400368: 00400239 .word 0x00400239 0040036c <__frame_dummy_init_array_entry>: 40036c: 004000f5 ..@. 00400370 <_fini>: 400370: b5f8 push {r3, r4, r5, r6, r7, lr} 400372: bf00 nop 400374: bcf8 pop {r3, r4, r5, r6, r7} 400376: bc08 pop {r3} 400378: 469e mov lr, r3 40037a: 4770 bx lr 0040037c <__fini_array_start>: 40037c: 004000d1 .word 0x004000d1