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差异

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This commit is contained in:
guishenking
2026-03-20 21:19:53 +08:00
parent 9d3b4b836f
commit 6a749331db
125 changed files with 29972 additions and 23051 deletions
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30
library/inc/lh32m0g3x_xlink.h
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@@ -28,16 +28,16 @@ typedef enum
XLINK0_INPUT_XB_IN1,
XLINK0_INPUT_XB_IN2,
XLINK0_INPUT_XB_IN3,
XLINK0_INPUT_TIM0_TRGO,
XLINK0_INPUT_TIM0_INT,
XLINK0_INPUT_TIM1_TRGO,
XLINK0_INPUT_TIM1_INT,
XLINK0_INPUT_TIM2_TRGO,
XLINK0_INPUT_TIM2_INT,
XLINK0_INPUT_ADC0_CNV_DONE,
XLINK0_INPUT_ADC1_CNV_DONE,
XLINK0_INPUT_LPTIM0_INT = 0x10u,
XLINK0_INPUT_LPTIM1_INT,
XLINK0_INPUT_BTIM0_TRIGGER,
XLINK0_INPUT_LPTIM1_INT = 0x10u,
XLINK0_INPUT_LPTIM2_INT,
XLINK0_INPUT_BTIM1_TRIGGER,
XLINK0_INPUT_BTIM2_TRIGGER,
XLINK0_INPUT_RTC_ALARM,
XLINK0_INPUT_FAULT,
XLINK0_INPUT_SOFT_SYNC,
@@ -55,20 +55,20 @@ typedef enum
typedef enum
{
XLINK1_INPUT_TIM0_TRGO = 0x00u, /*!< Cross Link 1 输入源 */
XLINK1_INPUT_TIM0_INT,
XLINK1_INPUT_TIM1_TRGO,
XLINK1_INPUT_TIM1_TRGO = 0x00u, /*!< Cross Link 1 输入源 */
XLINK1_INPUT_TIM1_INT,
XLINK1_INPUT_TIM2_TRGO,
XLINK1_INPUT_TIM2_INT,
XLINK1_INPUT_ADC0_CNV_DONE,
XLINK1_INPUT_ADC1_CNV_DONE,
XLINK1_INPUT_XB_IN0,
XLINK1_INPUT_XB_IN1,
XLINK1_INPUT_XB_IN2,
XLINK1_INPUT_XB_IN3,
XLINK1_INPUT_LPTIM0_INT = 0x0Eu,
XLINK1_INPUT_LPTIM1_INT,
XLINK1_INPUT_BTIM0_TRIGGER,
XLINK1_INPUT_LPTIM1_INT = 0x0Eu,
XLINK1_INPUT_LPTIM2_INT,
XLINK1_INPUT_BTIM1_TRIGGER,
XLINK1_INPUT_BTIM2_TRIGGER,
XLINK1_INPUT_RTC_ALARM,
XLINK1_INPUT_FAULT,
XLINK1_INPUT_SOFT_SYNC,
@@ -89,12 +89,12 @@ typedef enum
XLINK0_OUTPUT_ADC0_TRIG = 0x0008U,
XLINK0_OUTPUT_ADC1_TRIG = 0x0808U,
XLINK0_OUTPUT_DAC_SYNC = 0x1008U,
XLINK0_OUTPUT_TIM0_ITR0 = 0x1808U,
XLINK0_OUTPUT_TIM1_ITR0 = 0x000CU,
XLINK0_OUTPUT_TIM1_ITR0 = 0x1808U,
XLINK0_OUTPUT_TIM2_ITR0 = 0x000CU,
XLINK0_OUTPUT_MIO_TRIGGER_IN0 = 0x080CU,
XLINK0_OUTPUT_MIO_TRIGGER_IN1 = 0x100CU,
XLINK0_OUTPUT_LPTIM0_CL = 0x180CU,
XLINK0_OUTPUT_LPTIM1_CL = 0x0010U,
XLINK0_OUTPUT_LPTIM1_CL = 0x180CU,
XLINK0_OUTPUT_LPTIM2_CL = 0x0010U,
} XLINK0_OUTPUT_PORT_t;
/**

2
library/src/lh32m0g3x_dma.c
View File

@@ -319,8 +319,6 @@ void LHL_DMA_ITConfig(DMA_HandleTypeDef* handle, uint32_t DMA_IT, FunctionalStat
}
}
void LHL_DMA_Start(DMA_HandleTypeDef* handle)
{
pDMA_CONTROL->DMA_SERQ = handle->Channel;

2
library/src/lh32m0g3x_gpio.c
View File

@@ -118,7 +118,7 @@ void LHL_GPIO_Init(GPIO_TypeDef* pGPIOx, GPIO_InitTypeDef* GPIO_Init)
{
pGPIOx->PUE &= ~(1u << pinpos);
pGPIOx->PDE &= ~(1u << pinpos);
}
}
/* AFIO设置应该被设置 */
pGPIOx->CON0 &= ~((uint32_t)0xf << (pinpos*4));

248
library/src/lh32m0g3x_i2c.c
View File

@@ -645,6 +645,21 @@ void LHL_I2C_SoftwareResetCmd( FunctionalState NewState)
}
}
/**
* @brief Selects the specified I2C NACK position in master receiver mode.
* This function is useful in I2C Master Receiver mode when the number
* of data to be received is equal to 2. In this case, this function
* should be called (with parameter I2C_NACKPosition_Next) before data
* reception starts,as described in the 2-byte reception procedure
* recommended in Reference Manual in Section: Master receiver.
* @param I2C_NACKPosition: specifies the NACK position.
* This parameter can be one of the following values:
* @arg I2C_NACKPosition_Next: indicates that the next byte will be the last
* received byte.
* @arg I2C_NACKPosition_Current: indicates that current byte is the last
* received byte.
* @retval None
*/
void LHL_I2C_NACKPositionConfig(uint16_t I2C_NACKPosition)
{
/* Check the input parameter */
@@ -730,6 +745,14 @@ void LHL_I2C_StretchClockCmd(FunctionalState NewState)
}
}
/**
* @brief Selects the specified I2C fast mode duty cycle.
* @param I2C_DutyCycle: specifies the fast mode duty cycle.
* This parameter can be one of the following values:
* @arg I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2
* @arg I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9
* @retval None
*/
void LHL_I2C_FastModeDutyCycleConfig(uint16_t I2C_DutyCycle)
{
if (I2C_DutyCycle != I2C_DutyCycle_16_9)
@@ -744,6 +767,116 @@ void LHL_I2C_FastModeDutyCycleConfig(uint16_t I2C_DutyCycle)
}
}
/**
* @brief
****************************************************************************************
*
* I2C State Monitoring Functions
*
****************************************************************************************
* This I2C driver provides three different ways for I2C state monitoring
* depending on the application requirements and constraints:
*
* 1) Basic state monitoring:
* Using I2C_CheckEvent() function:
* It compares the status registers (SR1 and SR2) content to a given event
* (can be the combination of one or more flags).
* It returns SUCCESS if the current status includes the given flags
* and returns ERROR if one or more flags are missing in the current status.
* - When to use:
* - This function is suitable for most applications as well as for startup
* activity since the events are fully described in the product reference manual.
* - It is also suitable for users who need to define their own events.
* - Limitations:
* - If an error occurs (ie. error flags are set besides to the monitored flags),
* the I2C_CheckEvent() function may return SUCCESS despite the communication
* hold or corrupted real state.
* In this case, it is advised to use error interrupts to monitor the error
* events and handle them in the interrupt IRQ handler.
*
* @note
* For error management, it is advised to use the following functions:
* - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
* - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs.
* Where x is the peripheral instance (I2C1, I2C2 ...)
* - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler()
* in order to determine which error occured.
* - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
* and/or I2C_GenerateStop() in order to clear the error flag and source,
* and return to correct communication status.
*
*
* 2) Advanced state monitoring:
* Using the function I2C_GetLastEvent() which returns the image of both status
* registers in a single word (uint32_t) (Status Register 2 value is shifted left
* by 16 bits and concatenated to Status Register 1).
* - When to use:
* - This function is suitable for the same applications above but it allows to
* overcome the mentioned limitation of I2C_GetFlagStatus() function.
* The returned value could be compared to events already defined in the
* library or to custom values defined by user.
* - This function is suitable when multiple flags are monitored at the same time.
* - At the opposite of I2C_CheckEvent() function, this function allows user to
* choose when an event is accepted (when all events flags are set and no
* other flags are set or just when the needed flags are set like
* I2C_CheckEvent() function).
* - Limitations:
* - User may need to define his own events.
* - Same remark concerning the error management is applicable for this
* function if user decides to check only regular communication flags (and
* ignores error flags).
*
* 3) Flag-based state monitoring:
* Using the function I2C_GetFlagStatus() which simply returns the status of
* one single flag (ie. I2C_FLAG_RXNE ...).
* - When to use:
* - This function could be used for specific applications or in debug phase.
* - It is suitable when only one flag checking is needed (most I2C events
* are monitored through multiple flags).
* - Limitations:
* - When calling this function, the Status register is accessed. Some flags are
* cleared when the status register is accessed. So checking the status
* of one Flag, may clear other ones.
* - Function may need to be called twice or more in order to monitor one
* single event.
*
*/
/**
*
* 1) Basic state monitoring
*******************************************************************************
*/
/**
* @brief Checks whether the last I2Cx Event is equal to the one passed
* as parameter.
* @param I2C_EVENT: specifies the event to be checked.
* This parameter can be one of the following values:
* @arg I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED : EV1
* @arg I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED : EV1
* @arg I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED : EV1
* @arg I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED : EV1
* @arg I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED : EV1
* @arg I2C_EVENT_SLAVE_BYTE_RECEIVED : EV2
* @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF) : EV2
* @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL) : EV2
* @arg I2C_EVENT_SLAVE_BYTE_TRANSMITTED : EV3
* @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF) : EV3
* @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) : EV3
* @arg I2C_EVENT_SLAVE_ACK_FAILURE : EV3_2
* @arg I2C_EVENT_SLAVE_STOP_DETECTED : EV4
* @arg I2C_EVENT_MASTER_MODE_SELECT : EV5
* @arg I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED : EV6
* @arg I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED : EV6
* @arg I2C_EVENT_MASTER_BYTE_RECEIVED : EV7
* @arg I2C_EVENT_MASTER_BYTE_TRANSMITTING : EV8
* @arg I2C_EVENT_MASTER_BYTE_TRANSMITTED : EV8_2
* @arg I2C_EVENT_MASTER_MODE_ADDRESS10 : EV9
* @retval An ErrorStatus enumeration value:
* - LHL_OK: Last event is equal to the I2C_EVENT
* - LHL_ERROR: Last event is different from the I2C_EVENT
*/
LHL_StatusTypeDef LHL_I2C_CheckEvent(uint32_t I2C_EVENT)
{
uint32_t lastevent = 0;
@@ -798,6 +931,40 @@ uint32_t LHL_I2C_GetLastEvent(void)
return lastevent;
}
/**
*
* 3) Flag-based state monitoring
*******************************************************************************
*/
/**
* @brief Checks whether the specified I2C flag is set or not.
* @param I2C_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg I2C_FLAG_DUALF: Dual flag (Slave mode)
* @arg I2C_FLAG_SMBHOST: SMBus host header (Slave mode)
* @arg I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode)
* @arg I2C_FLAG_GENCALL: General call header flag (Slave mode)
* @arg I2C_FLAG_TRA: Transmitter/Receiver flag
* @arg I2C_FLAG_BUSY: Bus busy flag
* @arg I2C_FLAG_MSL: Master/Slave flag
* @arg I2C_FLAG_SMBALERT: SMBus Alert flag
* @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
* @arg I2C_FLAG_PECERR: PEC error in reception flag
* @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
* @arg I2C_FLAG_AF: Acknowledge failure flag
* @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
* @arg I2C_FLAG_BERR: Bus error flag
* @arg I2C_FLAG_TXE: Data register empty flag (Transmitter)
* @arg I2C_FLAG_RXNE: Data register not empty (Receiver) flag
* @arg I2C_FLAG_STOPF: Stop detection flag (Slave mode)
* @arg I2C_FLAG_ADD10: 10-bit header sent flag (Master mode)
* @arg I2C_FLAG_BTF: Byte transfer finished flag
* @arg I2C_FLAG_ADDR: Address sent flag (Master mode) "ADSL"
* Address matched flag (Slave mode)"ENDA"
* @arg I2C_FLAG_SB: Start bit flag (Master mode)
* @retval The new state of I2C_FLAG (SET or RESET).
*/
FlagStatus LHL_I2C_GetFlag(uint32_t I2C_FLAG)
{
FlagStatus bitstatus = RESET;
@@ -840,6 +1007,36 @@ FlagStatus LHL_I2C_GetFlag(uint32_t I2C_FLAG)
return bitstatus;
}
/**
* @brief Clears the I2Cx's pending flags.
* @param I2C_FLAG: specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg I2C_FLAG_SMBALERT: SMBus Alert flag
* @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
* @arg I2C_FLAG_PECERR: PEC error in reception flag
* @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
* @arg I2C_FLAG_AF: Acknowledge failure flag
* @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
* @arg I2C_FLAG_BERR: Bus error flag
*
* @note
* - STOPF (STOP detection) is cleared by software sequence: a read operation
* to I2C_SR1 register (I2C_GetFlagStatus()) followed by a write operation
* to I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral).
* - ADD10 (10-bit header sent) is cleared by software sequence: a read
* operation to I2C_SR1 (I2C_GetFlagStatus()) followed by writing the
* second byte of the address in DR register.
* - BTF (Byte Transfer Finished) is cleared by software sequence: a read
* operation to I2C_SR1 register (I2C_GetFlagStatus()) followed by a
* read/write to I2C_DR register (I2C_SendData()).
* - ADDR (Address sent) is cleared by software sequence: a read operation to
* I2C_SR1 register (I2C_GetFlagStatus()) followed by a read operation to
* I2C_SR2 register ((void)(I2Cx->SR2)).
* - SB (Start Bit) is cleared software sequence: a read operation to I2C_SR1
* register (I2C_GetFlagStatus()) followed by a write operation to I2C_DR
* register (I2C_SendData()).
* @retval None
*/
void LHL_I2C_ClearFlag(uint32_t I2C_FLAG)
{
uint32_t flagpos = 0;
@@ -850,6 +1047,27 @@ void LHL_I2C_ClearFlag(uint32_t I2C_FLAG)
pI2C->SR1 = (uint16_t)~flagpos;
}
/**
* @brief Checks whether the specified I2C interrupt has occurred or not.
* @param I2C_IT: specifies the interrupt source to check.
* This parameter can be one of the following values:
* @arg I2C_IT_SMBALERT: SMBus Alert flag
* @arg I2C_IT_TIMEOUT: Timeout or Tlow error flag
* @arg I2C_IT_PECERR: PEC error in reception flag
* @arg I2C_IT_OVR: Overrun/Underrun flag (Slave mode)
* @arg I2C_IT_AF: Acknowledge failure flag
* @arg I2C_IT_ARLO: Arbitration lost flag (Master mode)
* @arg I2C_IT_BERR: Bus error flag
* @arg I2C_IT_TXE: Data register empty flag (Transmitter)
* @arg I2C_IT_RXNE: Data register not empty (Receiver) flag
* @arg I2C_IT_STOPF: Stop detection flag (Slave mode)
* @arg I2C_IT_ADD10: 10-bit header sent flag (Master mode)
* @arg I2C_IT_BTF: Byte transfer finished flag
* @arg I2C_IT_ADDR: Address sent flag (Master mode) "ADSL"
* Address matched flag (Slave mode)"ENDAD"
* @arg I2C_IT_SB: Start bit flag (Master mode)
* @retval The new state of I2C_IT (SET or RESET).
*/
ITStatus LHL_I2C_GetPending(uint32_t I2C_IT)
{
ITStatus bitstatus = RESET;
@@ -876,6 +1094,36 @@ ITStatus LHL_I2C_GetPending(uint32_t I2C_IT)
return bitstatus;
}
/**
* @brief Clears the I2C interrupt pending bits.
* @param I2C_IT: specifies the interrupt pending bit to clear.
* This parameter can be any combination of the following values:
* @arg I2C_IT_SMBALERT: SMBus Alert interrupt
* @arg I2C_IT_TIMEOUT: Timeout or Tlow error interrupt
* @arg I2C_IT_PECERR: PEC error in reception interrupt
* @arg I2C_IT_OVR: Overrun/Underrun interrupt (Slave mode)
* @arg I2C_IT_AF: Acknowledge failure interrupt
* @arg I2C_IT_ARLO: Arbitration lost interrupt (Master mode)
* @arg I2C_IT_BERR: Bus error interrupt
*
* @note
* - STOPF (STOP detection) is cleared by software sequence: a read operation
* to I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to
* I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral).
* - ADD10 (10-bit header sent) is cleared by software sequence: a read
* operation to I2C_SR1 (I2C_GetITStatus()) followed by writing the second
* byte of the address in I2C_DR register.
* - BTF (Byte Transfer Finished) is cleared by software sequence: a read
* operation to I2C_SR1 register (I2C_GetITStatus()) followed by a
* read/write to I2C_DR register (I2C_SendData()).
* - ADDR (Address sent) is cleared by software sequence: a read operation to
* I2C_SR1 register (I2C_GetITStatus()) followed by a read operation to
* I2C_SR2 register ((void)(I2Cx->SR2)).
* - SB (Start Bit) is cleared by software sequence: a read operation to
* I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to
* I2C_DR register (I2C_SendData()).
* @retval None
*/
void LHL_I2C_ClearPending(uint32_t I2C_IT)
{
uint32_t flagpos = 0;

5
library/src/lh32m0g3x_lhl.c
View File

@@ -74,11 +74,6 @@ LHL_TickFreqTypeDef LHL_GetTickFreq(void)
return uTickFreq;
}
void SysTick_Handler(void)
{
LHL_IncTick(); // 调用 LHL 库提供的累加函数
}
/**
* @brief 暂停Systick中断
*/

2
library/src/lh32m0g3x_xlink.c
View File

@@ -28,7 +28,7 @@ void LHL_XLINK_Init(XLINK_InitTypeDef* XLink_Init)
tmp = (uint32_t)CROSSLINK_BASE;
tmp += (XLink_Init->XLink_0_Output & 0x0F);
pos = ((XLink_Init->XLink_0_Output >> 8) & 0x0F);
pos = ((XLink_Init->XLink_0_Output >> 8) & 0xFF);
*(__IO uint32_t *)tmp &= ~(0x1Fu << pos);
*(__IO uint32_t *)tmp |= ((uint32_t)XLink_Init->XLink_0_Input << pos);