差异
This commit is contained in:
@@ -5,23 +5,23 @@
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#define ZERO_OFFSET 32768
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//==============================================================================
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// System-state definition (for alarmState)
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#define PULSE_ALARM BITF //0x8000
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#define TEMP_ALARM BITE //0x4000
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#define FACTORY_FR_ALARM BITD //0x2000
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#define BATTERY_OFF BITC //0x1000
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#define CRYSTAL_ALARM BITB //0x0800
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#define ADC_ALARM BITA //0x0400
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#define RTC_ALARM BIT9 //0x0200
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#define EEPROM_ALARM BIT8 //0x0100
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//#define PULSE_ALARM BITF //0x8000
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//#define TEMP_ALARM BITE //0x4000
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//#define FACTORY_FR_ALARM BITD //0x2000
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//#define BATTERY_OFF BITC //0x1000
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//#define CRYSTAL_ALARM BITB //0x0800
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//#define ADC_ALARM BITA //0x0400
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//#define RTC_ALARM BIT9 //0x0200
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//#define EEPROM_ALARM BIT8 //0x0100
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#define IS_GAS_CH4 BIT7 //0x0080
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#define AP_CRC_ERROR BIT6 //0x0040
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#define BL_CRC_ERROR BIT5 //0x0020
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#define SENSOR_ERROR BIT4 //0x0010
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#define POLLUTION_ALARM BIT3 //0x0008
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#define HARD_ALARM BIT2 //0x0004
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#define FR_ALARM BIT1 //0x0002
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#define BATTERY_ALARM BIT0 //0x0001
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//#define IS_GAS_CH4 BIT7 //0x0080
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//#define AP_CRC_ERROR BIT6 //0x0040
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//#define BL_CRC_ERROR BIT5 //0x0020
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//#define SENSOR_ERROR BIT4 //0x0010
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//#define POLLUTION_ALARM BIT3 //0x0008
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//#define HARD_ALARM BIT2 //0x0004
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//#define FR_ALARM BIT1 //0x0002
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//#define BATTERY_ALARM BIT0 //0x0001
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//
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#define ALARM_SHIELD (BATTERY_OFF + SENSOR_ERROR + POLLUTION_ALARM + HARD_ALARM + \
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FR_ALARM + BATTERY_ALARM )
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484
user/Main/DP2201_TFS36200_M0_V10_Header.h
Normal file
484
user/Main/DP2201_TFS36200_M0_V10_Header.h
Normal file
@@ -0,0 +1,484 @@
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/********************************************************************************************************
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** DP1902 MFXXGD FLANGE IO<49><4F><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD>
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**
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** Copyright (c) Siargo, Ltd. 2011
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** All Rights Reserved.
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**
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**-------------------------------------------------------------------------------------------------------
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********************************************************************************************************/
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#ifndef __DP1703_TFS7306_M0_V10_Flange_h__
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#define __DP1703_TFS7306_M0_V10_Flange_h__
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#if DP2201_CORE_V5000
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//==============================================16================================
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#define PROGRAM_I2C_DEBUG 0
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//==============================================================================
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#define PRODUCT_MOD "TFS36200"
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#define VER_MV 5
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#define VER_SV 2
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#define VER_RV 0
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#define VER_BV 0
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#define BUILD_DATE "20260107" //build日期
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#define VERSION "2025.250901" //软件版本
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//#define SOFT_VERSION 2025 //软件版本
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/*******************************************************************************
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*******************************************************************************/
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// Microcontroller operating frequency
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#define FREQ 4000000//((8000000/32768))*32768 // system frequency definition
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#define TIMER_FREQ 32768
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#define ACLK_DIV DIVA__1
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#define SMCLK_DIV DIVS__2
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#define MCLK_DIV DIVM__1
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//******************************************************************************
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// Function selection
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//******************************************************************************
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//******************************************************************************
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#define DP2201_CORE_V5002 0
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#define DP2201_CORE_V5020 0
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#define DP2006_VM1000 1
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//------------------------------------------------------------------------------
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#define ENABLE_DCOEF 1 //?
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#define ENABLE_LOWPOWER_MODE 1
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//------------------------------------------------------------------------------
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#define ENABLE_AUTO_CALIB_ATYPE_OFFSET 1 //?
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//------------------------------------------------------------------------------
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// for ACC Compute
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#define REC_ACC_PER 0 // Acc flowrate save enable bit
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#define ENABLE_ACCPULSE 0 // <20><><EFBFBD>岻<EFBFBD>ܺ<EFBFBD><DCBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㲥ͬʱʹ<CAB1><CAB9>
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#define ENABLE_PULSE_USE_CALIB_SETUP 0
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//------------------------------------------------------------------------------
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// For data storage
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#define REC_ALARM_DATA 0 // for alarm data save enable bit
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#define REC_DATE_DATA 0 // for date acc data save enable bit
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#define REC_HISTORY_DATA 0 // for history data save enable bit
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//------------------------------------------------------------------------------
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// For Display
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#define ENABLE_LCD_DISPLAY 0
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// for GDT0136 LCD
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#define ENABLE_DISPLAY_FR_FLAG 0
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#define ENABLE_DISPLAY_ACC 0
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//------------------------------------------------------------------------------
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// For KEY SETUP
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#define ENABLE_KEY 0
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//------------------------------------------------------------------------------
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#define ENABLE_EXT_RTC 0
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#define ENABLE_EXT_CRYSTAL 1
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//------------------------------------------------------------------------------
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// For User UART & I2C
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#define ENABLE_USER_I2C 0
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#define ENABLE_USER_UART 1
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#define ENABLE_USE_TXD_EN 0
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#define ENABLE_TURN_OFF_RS485 0
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#define ENABLE_DIGITAL_OUTPUT 0
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#define ENABLE_FACTORY_PROTOCOL 0
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//------------------------------------------------------------------------------
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// for bluetooth beacon mode
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#define BLUETOOTH_MODE 0
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#define ENABLE_BLUETOOTH_BEACON (BLUETOOTH_MODE & (!ENABLE_ACCPULSE))
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//------------------------------------------------------------------------------
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#define ENABLE_NBIOT 0
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//------------------------------------------------------------------------------
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#define ENABLE_RF_UART (ENABLE_NBIOT | ENABLE_BLUETOOTH_BEACON) // RF Uart: NBIOT, Blue
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#define ENABLE_RF_RX 0
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#define ENABLE_AUTO_FOR_RF_TX 0 // for : INTER-NBIOT MOD
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#define ENABLE_AUTO_USER_UART_TX 0
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#define ENABLE_ERROR_USE_RF_TXDPIN 0
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#define ENABLE_ERROR_PIN_FOR_VALVE_CONTROL 0
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#define ENABLE_LEAK_DETECT 0
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#define ENABLE_AT_FOR_MASTER_UART (ENABLE_RF_UART)
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#define ENABLE_DENSITY_DETECT 0
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#define ENABLE_ACC_GAIN 0
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//------------------------------------------------------------------------------
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// For A-Type FlowRate Compute
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#define ENABLE_A_TYPE_FLOWRATE 0
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#define ENABLE_PLUG_IN_FLOWRATE 0
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//------------------------------------------------------------------------------
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// For Temperature test
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#define ENABLE_USE_MCP9808 1
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//------------------------------------------------------------------------------
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// For Temperature correction
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#define ENABLE_OFFSET_TRACK 0 //track<63><6B><EFBFBD><EFBFBD>
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#define ENABLE_OFFSET_CORRECT 1 //ƫ<><C6AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define ENABLE_AUTO_ZERO_TRACK 0
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#define ENABLE_TD_TU_SWITCH_CONTROL 0
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#define ENABLE_MULTI_PONIT_TA_CORR 1
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// For D9V2 if TEMP_CORR_USE_TA = 0 & TEMP_CORR_USE_RR = 0, use TGAS
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#define TEMP_CORR_USE_TA 0 // TPCB
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#define TEMP_CORR_USE_RR 0
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//------------------------------------------------------------------------------
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#define ENABLE_GAS_RECOGNITION 1
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#define ENABLE_GAS_RECOGNITION_TABLE 1
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#define ENABLE_RR_CALIBRATION ENABLE_GAS_RECOGNITION
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#define ENABLE_ONE_TABLE 0
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#define ENABLE_ONE_TABLE_NAME INTCMD_1ST_TABLE
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//------------------------------------------------------------------------------
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// for calibration data У<D0A3><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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// 如果ENABLE_2ND_CURVE 和 ENABLE_3RD_CURVE 有1，则ENABLE_ONE_CURVE必须为0
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#define ENABLE_ONE_CURVE 0
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#define ENABLE_2ND_CURVE 0
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#define ENABLE_3RD_CURVE 1
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//------------------------------------------------------------------------------
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#define ENABLE_HALT_IN_OPERATE_CURVE 1
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//------------------------------------------------------------------------------
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// For ADC Calibration
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#define ENABLE_CALIB_ATYPE_ADC 0
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//------------------------------------------------------------------------------
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#define ENABLE_EXTPOWER_DETECT 0
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#define DISABLE_BAT_ALARM_IN_EXPOWER 0
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#define DISABLE_BAT_ALARM 1
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#define ENABLE_DEBUG_PIN 0 // if Not<6F><74>use for RF Control pin
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#define ENABLE_ZERO_CALIB 1
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#define ENABLE_ZERO_CALIB_PIN 0 // if Not<6F><74>use for RF Control pin
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#define ENABLE_ZERO_CALIB_CMD 1
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#define ENABLE_CALPIN_FOR_UPDATE_FR 1
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//------------------------------------------------------------------------------
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// for internal modbus
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#define ENABLE_READ_CODE_INTO_CALIB 0
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//------------------------------------------------------------------------------
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// for SELECT BAT
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#define ENABLE_BAT_SEL_PIN 0 // use for RF Control pin
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//------------------------------------------------------------------------------
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// FOR FLOWRATE UNIT
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#define ENABLE_SCCM_SL 0
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#define ENABLE_SLPM_NM3 1
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#define ENABLE_NCMH_NM3 1
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#define ENABLE_SCFM_SCF 0
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#define ENABLE_PPM_PPM 0
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#define ENABLE_KGH_KG 0
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#define ENABLE_SLPM_SL 0
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#define ENABLE_SCFH_SCF 1
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#define ENABLE_FIXED_UART_FR 0
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#define FLOW_UNIT_DEFAULT SLPM_NM3 // SCFH_SCF
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#define FR_STD_UNIT SLPM // NCMH
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//------------------------------------------------------------------------------
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#define ACC_INT_8BIT 1
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#define ACC_INT_7BIT 0
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#define ACC_INT_6BIT (ENABLE_USE_GDT0136 | ENABLE_EDC20021HDC1P8)
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#define ENABLE_ACC_DEC_COMPUTE 0
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//------------------------------------------------------------------------------
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#define ENABLE_SAMPLE_GREATER_GAIN 1
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//------------------------------------------------------------------------------
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#define ENABLE_FLOW_GAIN 1
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#define FLOW_GAIN_DEFAULT 100
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#define FLOW_GAIN_MAX 1000
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//------------------------------------------------------------------------------
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// for user protocol
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#define ENABLE_USER_WP 1 // Write protect
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#define ENABLE_USER_GCF 1
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#define ENABLE_USER_OFFSET 1
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#define ENABLE_USER_WRITE_ACC 1
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#define ENABLE_USER_RESET_CORR 1
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#define ENABLE_USER_SET_UNIT 1
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#define ENABLE_ALARM_ACC 0
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//------------------------------------------------------------------------------
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#define ENABLE_ADJUST_ADC_GAIN 1
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//******************************************************************************
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#define TURN_OFF_SYSTEM 245 // 2.45V
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//******************************************************************************
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// Parameter default
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//******************************************************************************
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// FOR MODBUS Define
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// MODBUS Operation password
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#define COM_PASSWORD1 0x53495244 //0x53495244 "SIRD"
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#define COM_PASSWORD2 0x32303133
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#define COM_PASSWORD3 0x53494152
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// for MODBUS Default
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#define MAP1_DEFAULT STD_PROTOCOL
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#define MAP2_DEFAULT STD_SLAVER_ADDR
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#define MAP3_DEFAULT STD_FLOWRATE
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#define MAP4_DEFAULT (STD_FLOWRATE+1)
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#define MAP5_DEFAULT STD_ACC_INT
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#define MAP6_DEFAULT (STD_ACC_INT+1)
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#define MAP7_DEFAULT STD_ACC_DOT
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#define MAP8_DEFAULT (STD_METER_SN)
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#define MAP9_DEFAULT (STD_METER_SN+1)
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#define MAP10_DEFAULT (STD_METER_SN+2)
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#define MAP11_DEFAULT (STD_METER_SN+3)
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#define MAP12_DEFAULT (STD_METER_SN+4)
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#define MAP13_DEFAULT (STD_METER_SN+5)
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#define MAP14_DEFAULT STD_ALARM_1
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#define MAP15_DEFAULT STD_BAT1_V
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#define MAP16_DEFAULT STD_OUT_MAX_FLOW
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#define MAP17_DEFAULT (STD_OUT_MAX_FLOW+1)
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#define MAP18_DEFAULT STD_OUT_MIN_FLOW
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#define MAP19_DEFAULT (STD_OUT_MIN_FLOW+1)
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||||
#define MAP20_DEFAULT STD_GAS_OFFSET_C
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#define MAP21_DEFAULT STD_GAS_OFFSET_A
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#define MAP22_DEFAULT STD_TA
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#define MAP23_DEFAULT STD_TGAS
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#define MAP24_DEFAULT STD_GAS_FACTOR
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#define MAP25_DEFAULT STD_AIR_FACTOR
|
||||
#define MAP26_DEFAULT STD_FACTOR_VTH
|
||||
#define MAP27_DEFAULT 0
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||||
#define MAP28_DEFAULT 0
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||||
#define MAP29_DEFAULT 0
|
||||
#define MAP30_DEFAULT 0
|
||||
#define MAP31_DEFAULT 0
|
||||
#define MAP32_DEFAULT 0
|
||||
#define MAP33_DEFAULT 0
|
||||
#define MAP34_DEFAULT 0
|
||||
#define MAP35_DEFAULT 0
|
||||
#define MAP36_DEFAULT 0
|
||||
#define MAP37_DEFAULT 0
|
||||
#define MAP38_DEFAULT 0
|
||||
#define MAP39_DEFAULT 0
|
||||
#define MAP40_DEFAULT 0
|
||||
#define MAP41_DEFAULT 0
|
||||
#define MAP42_DEFAULT 0
|
||||
#define MAP43_DEFAULT 0
|
||||
#define MAP44_DEFAULT 0
|
||||
#define MAP45_DEFAULT 0
|
||||
#define MAP46_DEFAULT 0
|
||||
#define MAP47_DEFAULT 0
|
||||
#define MAP48_DEFAULT 0
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// FOR AUTO TXD DATA
|
||||
#define TIMING_TXD_START_DEFAULT STD_METER_SN
|
||||
#define TIMING_TXD_LEN_DEFAULT (STD_BAT1_V - STD_METER_SN)+1
|
||||
#define TIMING_TXD_TIME_DEFAULT 0
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define DIS_LANGUAGE_DEFAULT CHINESE
|
||||
//------------------------------------------------------------------------------
|
||||
#define KEY_PASSWORD_DEFAULT 11111
|
||||
//******************************************************************************
|
||||
//------------------------------------------------------------------------------
|
||||
#define MAX_ALRAM_FR_DEFAULT 160 // 1.25*128
|
||||
//------------------------------------------------------------------------------
|
||||
// INSTRUMENT_FACTOR = 1 ERROR_CORRECT = 0
|
||||
#define CORRECT_METHOD ERROR_CORRECT
|
||||
#define ENABLE_GCF_POWER_CORR 0
|
||||
//------------------------------------------------------------------------------
|
||||
#define METER_PARAMETER_STD 1000
|
||||
#define METER_PARAMETER_DEFAULT 1000
|
||||
#define METER_PARAMETER_MAX 6500
|
||||
#define METER_PARAMETER_MIN 112
|
||||
//------------------------------------------------------------------------------
|
||||
#define GCF_PARAMETER_STD 1000
|
||||
#define GCF_PARAMETER_MAX 5500
|
||||
#define GCF_PARAMETER_MIN 250
|
||||
#define GCF_ATYPE_DEFAULT 850
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#if(ENABLE_GCF_POWER_CORR)
|
||||
//------------------------------------------------------------------------------
|
||||
#define GCF_DEFAULT 889
|
||||
#define GCF_A_DEFAULT -46
|
||||
#define GCF_C_DEFAULT 226
|
||||
|
||||
#define GCF_A_DOT 1000
|
||||
#define GCF_B_DOT 1000
|
||||
#define GCF_C_DOT 1000000 // for mm2 No dot bit
|
||||
//------------------------------------------------------------------------------
|
||||
#else
|
||||
//------------------------------------------------------------------------------
|
||||
#if(DP1902COREV0134)
|
||||
#define GCF_DEFAULT 850
|
||||
#else
|
||||
#define GCF_DEFAULT 1030
|
||||
#endif
|
||||
//----------------------------------------------------------------------------
|
||||
|
||||
#define GCF_A_DEFAULT 0
|
||||
#define GCF_C_DEFAULT 0
|
||||
|
||||
#define GCF_A_DOT 10000000000
|
||||
#define GCF_B_DOT 1000
|
||||
#define GCF_C_DOT 10000
|
||||
//------------------------------------------------------------------------------
|
||||
#endif
|
||||
//------------------------------------------------------------------------------
|
||||
#define TIMING_TXD_START_MAX STD_WRITE_START
|
||||
#define TIMING_TXD_START_MIN STD_REG_START
|
||||
#define TIMING_TXD_LEN_MAX 40
|
||||
#define TIMING_TXD_LEN_MIN 1
|
||||
#define TIMING_TXD_TIME_MAX 45000 //
|
||||
//------------------------------------------------------------------------------
|
||||
#define SAMPLE_PERIOD_DEFAULT RESP_250MS // RESP_4000MS
|
||||
#define EXT_POWER_PERIOD_TIME RESP_250MS // RESP_500MS //<2F>ⲿ<EFBFBD><E2B2BF>Դ
|
||||
//------------------------------------------------------------------------------
|
||||
#define RESPONSE_TIME_DEFAULT RESP_2000MS // 125, 250, 500, 1000, 2000, 4000
|
||||
#define ENABLE_DISPLAY_FILTER 1
|
||||
#define DISPLAY_FILTER_DEFAULT RESP_1000MS // 1S
|
||||
#define FLOWRATE_UPDATE_SCALE 18 // 50/1024= 5%
|
||||
#define FRINDEX_UPDATE_SCALE 8 // 50/1024= 5%
|
||||
//------------------------------------------------------------------------------
|
||||
#define CALIB_PULSE_DEFAULT PULSE_1ML
|
||||
#define CALIB_PULSE_UNIT_MIN PULSE_1ML
|
||||
#define CALIB_PULSE_UNIT_MAX PULSE_1000L
|
||||
|
||||
#define PULSE_LEVEL_DEFAULT LOW
|
||||
#define PULSE_UNIT_DEFAULT PULSE_1000L
|
||||
#define PULSE_UNIT_MIN PULSE_100ML
|
||||
#define PULSE_UNIT_MAX PULSE_1000L
|
||||
|
||||
//for key setup
|
||||
#define PULSE_UNIT_INDEX_MIN PULSE_100ML_INDEX
|
||||
#define PULSE_UNIT_INDEX_MAX PULSE_1000L_INDEX
|
||||
//------------------------------------------------------------------------------
|
||||
#define COM_DECIMAL_POINT_DEFAULT 3
|
||||
//------------------------------------------------------------------------------
|
||||
#define MAX_FR_DEFAULT 600000
|
||||
#define MIN_FR_DEFAULT 0
|
||||
#define CLIAB_STD_FR_GIAN 1 // <20><>ԭ<EFBFBD><D4AD>1000<30>Ļ<EFBFBD><C4BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//------------------------------------------------------------------------------
|
||||
#define ADC_GAIN_DEFAULT 32
|
||||
//------------------------------------------------------------------------------
|
||||
// for AType FlowRate Compute
|
||||
#define SDT_ZERO_OFFSET 20000
|
||||
#define OFFSET_A_MAX 30000
|
||||
#define OFFSET_A_MIN 10000
|
||||
|
||||
#define AUTO_OFFSET_NIDX 150
|
||||
#define AUTO_OFFSET_NVHH 5000
|
||||
|
||||
#define SWITCH_FR_DEFAULT 20000
|
||||
#define SWITCH_FR_INDEX_MAX 30000
|
||||
#define SWITCH_FR_INDEX_MIN 1000
|
||||
|
||||
#define ATYPE_INDEX_GAIN_DEFAULT 30
|
||||
#define ATYPE_INDEX_GAIN_MAX 100
|
||||
#define ATYPE_INDEX_GAIN_MIN 10
|
||||
//------------------------------------------------------------------------------
|
||||
#define TEMPRETURE_OFFSET 10000 // 2bit
|
||||
#define FR_TEMPERATURE_DEAULT 2000
|
||||
|
||||
#define TEMPERATURE_K_STD 27315
|
||||
#define FR_TEMPERATURE_STD 29315 // 273.15 + 20.00
|
||||
//------------------------------------------------------------------------------
|
||||
#define ENABLE_WRITE_TA_HIGH (TEMPRETURE_OFFSET+4750)
|
||||
#define ENABLE_WRITE_TA_LOW (TEMPRETURE_OFFSET+150)
|
||||
#define ENABLE_WRITE_TA_SCALE 150 // 1.5<EFBFBD><EFBFBD>C
|
||||
|
||||
#define TEMP_FACTOR_MAX 50 // 0.005
|
||||
#define TEMP_FACTOR_MIN 0 //-0.005
|
||||
#define TEMP_FACTOR_DEFAULT 25 //-0.0025
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define STATIC_LOW_TA_MAX 11000 // 10<31><30>C
|
||||
#define STATIC_LOW_TA_MIN 8000 // -20<32><30>C
|
||||
#define STATIC_HIGH_TA_MAX 17000 // 70<37><30>C
|
||||
#define STATIC_HIGH_TA_MIN 14000 // 40<34><30>C
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define TGAS_ALARM_MAX 17000 // 70<37><30>C
|
||||
#define TGAS_ALARM_MIN 5000 // -50<35><30>C
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define CALIB_TEMPRETURE_MAX 13500
|
||||
#define CALIB_TEMPRETURE_MIN 11500
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define ZERO_SUPPRESSION_DEFAULT 150
|
||||
#define ZERO_SUPPRESSION_MAX 2000
|
||||
#define ZERO_SUPPRESSION_MIN 0
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define OFFSET_MAX 36768
|
||||
#define OFFSET_MIN 28768
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define REVERSE_SCALE_DEFAULT 3000
|
||||
#define REVERSE_SCALE_MAX 16000
|
||||
#define REVERSE_SCALE_MIN 300
|
||||
//------------------------------------------------------------------------------
|
||||
#define CURVE_DATA_MAX 36
|
||||
|
||||
#define TACURVE_NUM_DEFAULT 0
|
||||
#define CURVE_NUM_MAX CURVE_DATA_MAX
|
||||
#define CURVE_NUM_MIN 0
|
||||
|
||||
#define ATYPECURVE_NUM_DEFAULT 0
|
||||
#define ATYPECURVE_NUM_MAX CURVE_DATA_MAX
|
||||
#define ATYPECURVE_NUM_MIN 0
|
||||
//------------------------------------------------------------------------------
|
||||
#define RR_GAINRES_DEFAULT 7500
|
||||
#define RR_GAINRES_MAX 62000
|
||||
#define RR_GAINRES_MIN 10000
|
||||
#define RR_OPGAIN_RES 33000.0
|
||||
//------------------------------------------------------------------------------
|
||||
#define AIR_FACTOR_DEFAULT 32768
|
||||
#define AIR_FACTOR_MAX 50768
|
||||
#define AIR_FACTOR_MIN 14768
|
||||
|
||||
#define FACTOR_VTH_DEFAULT 1000
|
||||
#define FACTOR_VT_MAX 10000
|
||||
#define FACTOR_VT_MIN 100
|
||||
//------------------------------------------------------------------------------
|
||||
#define SLAVER_ADDR_DEFAULT 1
|
||||
//------------------------------------------------------------------------------
|
||||
#define RECORD_TIME_DEFAULT 60 // HISTORY_PERIOD
|
||||
//------------------------------------------------------------------------------
|
||||
#define BATTEST_PERIOD_DEFAULT 120
|
||||
//------------------------------------------------------------------------------
|
||||
#define RH_GAINRES_DEFAULT 25
|
||||
//------------------------------------------------------------------------------
|
||||
#define DAC8760 0
|
||||
#define AD5420 1
|
||||
#define SYS_LOOP_CHIP_DEFAULT DAC8760
|
||||
#define SYS_LOOP_CHIP_MIN DAC8760
|
||||
#define SYS_LOOP_CHIP_MAX AD5420
|
||||
//------------------------------------------------------------------------------
|
||||
#define EDM779106D 0
|
||||
#define EDM779103D 1
|
||||
#define SYS_LCD_DEFAULT EDM779106D
|
||||
#define SYS_LCD_MIN EDM779106D
|
||||
#define SYS_LCD_MAX EDM779103D
|
||||
|
||||
//******************************************************************************
|
||||
#define CALIB_WIDTH 100 //帧宽 Flash的话4096的余数 (通讯用)
|
||||
#define MEMORY_BLOCK_WIDTH 128
|
||||
|
||||
#define CALIB_COMP_FAC 3 //压缩比
|
||||
#define CALIB_MAX_INDEX 24000 //最大内码
|
||||
#define CALIB_DEPTH ((CALIB_MAX_INDEX / CALIB_WIDTH) * 3) // 必须为整数，(Index * 3)/CALIB_WIDTH 校准数据帧数(通讯用)
|
||||
#define CALIB_MAX_SIZE ((CALIB_MAX_INDEX / CALIB_COMP_FAC)* 3) // 必须为整数
|
||||
#define CALIB_REAL_SIZE (((CALIB_MAX_SIZE / MEMORY_BLOCK_WIDTH)+1)*MEMORY_BLOCK_WIDTH)
|
||||
#define MAX_OPERATE_DEPTH (CALIB_DEPTH / CALIB_COMP_FAC)
|
||||
|
||||
//for calibration VHH
|
||||
#define CALIB_COMP_FAC2 3 //压缩比
|
||||
#define CALIB_MAX_INDEX2 0 //最大内码
|
||||
#define CALIB_DEPTH2 ((CALIB_MAX_INDEX2 / CALIB_WIDTH) * 3) // 必须为整数，(Index * 3)/CALIB_WIDTH 校准数据帧数(通讯用)
|
||||
#define CALIB_MAX_SIZE2 ((CALIB_MAX_INDEX2 / CALIB_COMP_FAC2)* 3) // 必须为整数
|
||||
#define CALIB_REAL_SIZE2 (((CALIB_MAX_SIZE2 / MEMORY_BLOCK_WIDTH)+1)*MEMORY_BLOCK_WIDTH)
|
||||
#define MAX_OPERATE_DEPTH2 (CALIB_DEPTH2 / CALIB_COMP_FAC2)
|
||||
|
||||
// for calibration A Type FlowRate
|
||||
#define CALIB_COMP_FAC3 8 //压缩比
|
||||
#define CALIB_MAX_INDEX3 24000 //最大内码
|
||||
#define CALIB_DEPTH3 ((CALIB_MAX_INDEX3 / CALIB_WIDTH) * 3) // 必须为整数，(Index * 3)/CALIB_WIDTH 校准数据帧数(通讯用)
|
||||
#define CALIB_MAX_SIZE3 ((CALIB_MAX_INDEX3 / CALIB_COMP_FAC3)* 3) // 必须为整数
|
||||
#define CALIB_REAL_SIZE3 (((CALIB_MAX_SIZE3 / MEMORY_BLOCK_WIDTH)+1)*MEMORY_BLOCK_WIDTH)
|
||||
#define MAX_OPERATE_DEPTH3 (CALIB_DEPTH3/CALIB_COMP_FAC3)
|
||||
|
||||
#define CALI_DATA1_ADDR CALI_DATA_ADDR
|
||||
#define CALI_DATA2_ADDR CALI_DATA_ADDR + CALIB_REAL_SIZE //曲线1的地址 + 曲线1存储大小
|
||||
#define CALI_DATA3_ADDR CALI_DATA2_ADDR + CALIB_REAL_SIZE2 //曲线2的地址 + 曲线2存储大小
|
||||
|
||||
//******************************************************************************
|
||||
#define CTYPE_FR CURVE_1ST
|
||||
#define ATYPE_VH CURVE_2ND
|
||||
#define CTYPE_GAINX CURVE_3RD
|
||||
|
||||
#define INT_2ND_CURVE_CMD INTCMD_ATYPE_CURVE
|
||||
#define INT_3RD_CURVE_CMD INTCMD_MICROFR_CURVE
|
||||
//==============================================================================
|
||||
//******************************************************************************
|
||||
#endif
|
||||
#endif
|
||||
@@ -16,6 +16,7 @@
|
||||
typedef uint8_t u8; // <20><EFBFBD><DEB7><EFBFBD>8λ<38><CEBB><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||
typedef int8_t s8; // <20>з<EFBFBD><D0B7><EFBFBD>8λ<38><CEBB><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||
typedef uint16_t u16; // <20><EFBFBD><DEB7><EFBFBD>16λ<36><CEBB><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||
typedef unsigned short int u16;
|
||||
typedef int16_t s16; // <20>з<EFBFBD><D0B7><EFBFBD>16λ<36><CEBB><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||
typedef uint32_t u32; // <20><EFBFBD><DEB7><EFBFBD>32λ<32><CEBB><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||
typedef int32_t s32; // <20>з<EFBFBD><D0B7><EFBFBD>32λ<32><CEBB><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||
@@ -122,6 +123,7 @@ typedef struct
|
||||
|
||||
}__SYS_BIT_TypeDef;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u32 UARTHandle: 1;
|
||||
|
||||
@@ -36,8 +36,8 @@
|
||||
//******************************************************************************
|
||||
|
||||
#define DP0000_FS5001_H2 0
|
||||
#define DP2201_M0CONTROL 0
|
||||
#define DP2006V1000 1
|
||||
#define DP2201_M0CONTROL 1
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -1,12 +1,12 @@
|
||||
#include "../main/SystemInclude.h"
|
||||
|
||||
u16 systmeState ;
|
||||
u16 UPGRADECammand ;
|
||||
u16 CodeCRC ;
|
||||
u16 jumpError ;
|
||||
u16 systmeState;
|
||||
//u16 UPGRADECammand ;
|
||||
//u16 CodeCRC ;
|
||||
u16 jumpError;
|
||||
//******************************************************************************
|
||||
// for internel modbus
|
||||
u32 securityID; //
|
||||
//u32 securityID; //
|
||||
|
||||
//*****************************************************************************
|
||||
//for modbus >16bit register define
|
||||
@@ -16,16 +16,17 @@ u64 flowAccumulationHex;
|
||||
u32 minFlowRate,maxFlowRate,minAnalogOutput,maxAnalogOutput;
|
||||
u32 alarmAcc,alarmUpperFlowRate,alarmLowerFlowRate;
|
||||
u32 reverseFlowRateMin, reverseFlowRateMax;
|
||||
u32 keyPassWord;
|
||||
//*******************************************************************************
|
||||
__SystemProcess_Union_TypeDef systemProcess;
|
||||
|
||||
//*******************************************************************************
|
||||
__SystemProcess_Union_TypeDef systemProcessing; //<2F><><EFBFBD><EFBFBD>ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>״̬
|
||||
__SystemState_Union_TypeDef currentMode;
|
||||
__Hardware_Status_Bit_TypeDef HWState;
|
||||
__Alarm_State_TypeDef systemAlarm;
|
||||
|
||||
//******************************************************************************
|
||||
u16 curveMode;
|
||||
u16 SysLcd, SysLoopChip;// currentSysState;
|
||||
u16 testTypeCounter, MEMSErrorCounter;
|
||||
u16 testTypeCounter;//, MEMSErrorCounter;
|
||||
u16 systemVoltage, batteryGrid;
|
||||
u16 calibType;
|
||||
// for code CRC
|
||||
@@ -33,9 +34,7 @@ u16 APPCodeCRC;
|
||||
u32 securityID;
|
||||
u16 IDvalidTime, comCounter, comResetCounter, AutoOffsetCounter, timePeriod, autoTxdCounter, SysVolErrorCount;
|
||||
u32 ModeExitTime;
|
||||
u16 language;
|
||||
__Display_Status_Bit_TypeDef displayMode;
|
||||
u16 roughTestCounter, testCounter;
|
||||
// for save data
|
||||
u16 timeCompute;
|
||||
//for system
|
||||
@@ -46,16 +45,13 @@ u8 Dis1[15], timer[8];
|
||||
u16 displayUpdate, displayCNT;
|
||||
//u8 flowRateUnit, AccUnit;
|
||||
//------------------------------------------------------------------------------
|
||||
// for ADC Sampling
|
||||
u16 reverseScale, zeroSuppression, calibFlowGain;
|
||||
//------------------------------------------------------------------------------
|
||||
// for flowRate
|
||||
u32 currentFlowRate, factoryFlowRate;
|
||||
//------------------------------------------------------------------------------
|
||||
u16 calibTemperature;
|
||||
//u16 calibTemperature;
|
||||
//------------------------------------------------------------------------------
|
||||
// for acc pulse output
|
||||
u16 samplingInterval, samplingIntervalTarget, factoryInterval, responseTimeIndex;
|
||||
u16 samplingInterval, samplingIntervalTarget, responseTimeIndex;
|
||||
u16 updatePulseTime;
|
||||
//------------------------------------------------------------------------------
|
||||
u16 tmpIA;
|
||||
@@ -68,11 +64,11 @@ TypeLongLong tempDev;
|
||||
//------------------------------------------------------------------------------
|
||||
const u8 ProductModel[12] = PRODUCT_MOD;
|
||||
const u8 SoftVersion[12] = VERSION;
|
||||
const u8 SoftBuildDate[10] = BUILD_MV;
|
||||
const u8 SoftBuildDate[10] = BUILD_DATE;
|
||||
const u8 PulseOutGain[] ={32,16,8,4,2,1}; //
|
||||
const u8 FilterMax[] ={1, 2, 4, 8, 16, 32}; // filter depth
|
||||
const u16 Timing[] ={BASE_125MS, BASE_250MS, BASE_500MS, BASE_1000MS, BASE_2000MS, BASE_4000MS};
|
||||
const u16 TimeVaule[] ={4096, 8192, 16384, 32768, 65535}; //2048, 0.125s<EFBFBD><EFBFBD>0.25s, 0.5s, 1s, 2s, 4s
|
||||
const u16 TimeVaule[] ={2048,4096, 8192, 16384, 32768, 65535}; //2048, 0.125s<EFBFBD><EFBFBD>0.25s, 0.5s, 1s, 2s, 4s
|
||||
const u16 UpdateTimeVaule[] ={3000, 3850, 7372, 8192, 16384, 16384}; // 0.235s, 0.45s, 0.5s, 1s, 2s
|
||||
const u16 FRUnitForHour[] ={28800, 14400, 7200, 3600, 1800, 900};
|
||||
const u16 FRUnitForMinute[] ={480, 240, 120, 60, 30, 15};
|
||||
@@ -80,60 +76,54 @@ const u16 FRUnitForMinute[] ={480, 240, 120, 60, 30, 15};
|
||||
const u8 BuildDate[] = __DATE__; // "Oct 30 2010"
|
||||
/******************************************************************************/
|
||||
|
||||
|
||||
//******************************************************************************
|
||||
void EnterUserMode(void)
|
||||
{
|
||||
currentMode.Bit.CalibMode = 0;
|
||||
currentMode.Bit.IntCalibMode = 0;
|
||||
|
||||
currentMode.Bit.CalibMode = 0;
|
||||
currentMode.Bit.IntCalibMode = 0;
|
||||
currentMode.Bit.FactoryTestMode = 0;
|
||||
currentMode.Bit.DebugMode = 0;
|
||||
|
||||
currentMode.Bit.DigitOutput = 1;
|
||||
currentMode.Bit.ComModeOperate = 0;
|
||||
currentMode.Bit.DebugMode = 0;
|
||||
currentMode.Bit.DigitOutput = 1;
|
||||
currentMode.Bit.ComModeOperate = 0;
|
||||
ModeExitTime = 0;
|
||||
}
|
||||
|
||||
//******************************************************************************
|
||||
void EnterCalibMode(void)
|
||||
{
|
||||
currentMode.Bit.CalibMode = 1;
|
||||
currentMode.Bit.IntCalibMode = 1;
|
||||
currentMode.Bit.CalibMode = 1;
|
||||
currentMode.Bit.IntCalibMode = 1;
|
||||
currentMode.Bit.FactoryTestMode = 0;
|
||||
currentMode.Bit.DebugMode = 0;
|
||||
currentMode.Bit.DigitOutput = 1;
|
||||
currentMode.Bit.ComModeOperate = 1;
|
||||
currentMode.Bit.DebugMode = 0;
|
||||
currentMode.Bit.DigitOutput = 1;
|
||||
currentMode.Bit.ComModeOperate = 1;
|
||||
ModeExitTime = 0;
|
||||
}
|
||||
|
||||
//******************************************************************************
|
||||
void EnterZeroCalibMode(void)
|
||||
{
|
||||
currentMode.Bit.CalibMode = 1;
|
||||
currentMode.Bit.IntCalibMode = 1;
|
||||
currentMode.Bit.ZeroCalib = 1;
|
||||
|
||||
currentMode.Bit.CalibMode = 1;
|
||||
currentMode.Bit.IntCalibMode = 1;
|
||||
currentMode.Bit.ZeroCalib = 1;
|
||||
currentMode.Bit.FactoryTestMode = 0;
|
||||
currentMode.Bit.DebugMode = 0;
|
||||
currentMode.Bit.DigitOutput = 1;
|
||||
currentMode.Bit.ComModeOperate = 1;
|
||||
currentMode.Bit.DebugMode = 0;
|
||||
currentMode.Bit.DigitOutput = 1;
|
||||
currentMode.Bit.ComModeOperate = 1;
|
||||
ModeExitTime = 0;
|
||||
}
|
||||
|
||||
//******************************************************************************
|
||||
void EnterBatteryMode(void)
|
||||
{
|
||||
currentMode.Bit.CalibMode = 0;
|
||||
currentMode.Bit.IntCalibMode = 0;
|
||||
currentMode.Bit.CalibMode = 0;
|
||||
currentMode.Bit.IntCalibMode = 0;
|
||||
currentMode.Bit.FactoryTestMode = 0;
|
||||
currentMode.Bit.DebugMode = 0;
|
||||
|
||||
currentMode.Bit.DigitOutput = 1;
|
||||
currentMode.Bit.ComModeOperate = 1;
|
||||
|
||||
currentMode.Bit.DebugMode = 0;
|
||||
currentMode.Bit.DigitOutput = 1;
|
||||
currentMode.Bit.ComModeOperate = 1;
|
||||
currentMode.Bit.ExtPowerInput = 0;
|
||||
ModeExitTime = 0;
|
||||
currentMode.Bit.ExtPowerInput = 0;
|
||||
}
|
||||
|
||||
//******************************************************************************
|
||||
@@ -154,91 +144,86 @@ void EnterGcfTestMode(void)
|
||||
{
|
||||
currentMode.Bit.CalibMode = 0;
|
||||
currentMode.Bit.FactoryTestMode = 0;
|
||||
currentMode.Bit.DebugMode = 0;
|
||||
|
||||
currentMode.Bit.DebugMode = 0;
|
||||
currentMode.Bit.ExtPowerInput = 1;
|
||||
currentMode.Bit.DigitOutput = 1;
|
||||
currentMode.Bit.ComModeOperate = 1;
|
||||
ModeExitTime = 0;
|
||||
}
|
||||
|
||||
////******************************************************************************
|
||||
/******************************************************************************/
|
||||
void ModeExitCount(void)
|
||||
{
|
||||
//----------------------------------------------------------------------------
|
||||
// ONE SENCOND
|
||||
// 16384*30 / 128
|
||||
IDvalidTime += timePeriod;
|
||||
if(IDvalidTime >= ID_VALID_TIME) {
|
||||
IDvalidTime = 0;
|
||||
securityID = 0;
|
||||
HWState.EnableCheckCorr = 1;
|
||||
}
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// comm return counter
|
||||
if(currentMode.Bit.CalibMode) {
|
||||
comCounter += timePeriod;
|
||||
if(comCounter >= comResetCounter) {
|
||||
comCounter = 0;
|
||||
comResetCounter = TIMING_500mS;
|
||||
currentMode.Bit.DigitOutput = 1;
|
||||
systemProcessing.Bit.WriteHandle = 0;
|
||||
}
|
||||
}
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// mode return counter
|
||||
ModeExitTime += (u32)timePeriod;
|
||||
if(ModeExitTime >= (u32)EXIT_7200S) {
|
||||
ModeExitTime = 0;
|
||||
EnterUserMode();
|
||||
// currentMode.Bit.ComModeOperate = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
void ManagePrimaryTimeInterval(void)
|
||||
{
|
||||
u32 currentPerPulse;
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
samplingIntervalForTotal = samplingInterval;
|
||||
timePeriod = TimeVaule[samplingInterval];
|
||||
timePeriod >>= 7;
|
||||
|
||||
samplingInterval = samplingIntervalTarget;
|
||||
ResetPrimaryTimer(TimeVaule[samplingInterval]);
|
||||
|
||||
samplingIntervalTarget = factoryInterval;//
|
||||
|
||||
if(currentMode.Bit.CalibMode)
|
||||
{
|
||||
//currentPerPulse = (s16)calibUnitPerPuls;
|
||||
sampleState.EnableRoughTest = 0;
|
||||
HWState.EnableCheck = 1;
|
||||
samplingIntervalTarget = (u16)EXT_POWER_PERIOD_TIME;
|
||||
}
|
||||
else
|
||||
{
|
||||
//currentPerPulse = (s16)factoryUnitPerPuls;
|
||||
if(currentMode.Bit.ExtPowerInput)
|
||||
{
|
||||
HWState.EnableCheck = 1;
|
||||
samplingIntervalTarget = (u16)EXT_POWER_PERIOD_TIME;
|
||||
currentMode.Bit.TurnOffSystem = 0;
|
||||
sampleState.EnableRoughTest = 0;
|
||||
}
|
||||
}
|
||||
//---------------------------------------------------------------------------
|
||||
#ifndef ENABLE_ACCPULSE
|
||||
#pragma message("[undefined] ENABLE_ACCPULSE")
|
||||
#elif(ENABLE_ACCPULSE)
|
||||
currentPerPulse = InitPulseUnit(currentPerPulse);
|
||||
if(currentPerPulse != unitPerPulse) lastRemaining = 0;
|
||||
unitPerPulse = currentPerPulse;
|
||||
#endif
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
if((currentMode.Bit.DebugMode)||(currentMode.Bit.ZeroCalib))
|
||||
{
|
||||
sampleState.EnableRoughTest = 0;
|
||||
testCounter = 5;
|
||||
}
|
||||
else if(MEMSErrorCounter != 0) testCounter = 2;
|
||||
else testCounter = 60;
|
||||
//if(samplingInterval < 3) sampleState.EnableRoughTest = 0;
|
||||
if(currentMode.Bit.CalibMode) samplingIntervalTarget = (u16)EXT_POWER_PERIOD_TIME;
|
||||
else samplingIntervalTarget = factoryInterval;//
|
||||
currentMode.Bit.TurnOffSystem = 0;
|
||||
}
|
||||
|
||||
|
||||
u32 ReadParameterFromMemory(u16 parameterAdr, u16 parameterLen, u32 parameterDefault)
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>------------------------------------------------------------
|
||||
void EnterMainEntry(void)
|
||||
{
|
||||
tempDev.DWord[0] = 0;
|
||||
|
||||
if(1) ReadParameterFromFlash(tempDev.Byte , parameterAdr , parameterLen , VENDER_PARAMS_PAGE);
|
||||
else ReadMultiByteFromEEPROM(parameterAdr, tempDev.Byte, parameterLen, PARA_EEPROM);
|
||||
// samplingInterval = 1;
|
||||
|
||||
parameterLen--;
|
||||
|
||||
if(tempDev.Byte[parameterLen] != CRC8(tempDev.Byte, parameterLen))
|
||||
{
|
||||
tempDev.DWord[0] = (u32)parameterDefault;
|
||||
isReadParameterOK = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
tempDev.Byte[parameterLen] = 0;
|
||||
isReadParameterOK = 1;
|
||||
}
|
||||
|
||||
return tempDev.DWord[0];
|
||||
// ע<><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
StartPrimaryTimer(TimeVaule[samplingInterval]); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
lptimer_register_irq_callback(PrimaryTimer, PrimaryTimer_IRQ_Callback);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
void BackupParameterToFlash(void)
|
||||
{
|
||||
//FY WriteShortParameterToBuffer(UPGRADECammand, UPGRADE_APP, UPGRADE_APP_WIDTH);
|
||||
//FY WriteShortParameterToBuffer(localAddress, SLAVER_ADDR, SLAVER_ADDR_WIDTH);
|
||||
//WriteShortParameterToBuffer(baudRate, BAUD_RATE, BAUD_RATE_WIDTH);
|
||||
// clear_WDT();
|
||||
// Clear_WDT();
|
||||
//
|
||||
// disable_interrupts();
|
||||
////FY WriteMultiByteToInfoSegment(PARAMETER_BASE, FlashBuf, PARA_LEN);
|
||||
@@ -249,81 +234,80 @@ void BackupParameterToFlash(void)
|
||||
|
||||
//******************************************************************************
|
||||
//ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
u32 sn ;
|
||||
void SystemParameterInit(void)
|
||||
{
|
||||
currentMode.Bit.ComModeOperate = 0;
|
||||
//==============================================================================
|
||||
// <20>ȶ<EFBFBD>ȡ<EFBFBD>¶ȣ<C2B6><C8A3>ж<EFBFBD>ģʽ
|
||||
StaticTemperatureInit();
|
||||
ManagePrimaryTimeInterval();
|
||||
//==============================================================================
|
||||
meterSN1 = ReadParameterFromMemory(SERIES_BASE+0*SENSOR_SN_WIDTH ,SENSOR_SN_WIDTH ,0);
|
||||
meterSN2 = ReadParameterFromMemory(SERIES_BASE+1*SENSOR_SN_WIDTH ,SENSOR_SN_WIDTH ,0);
|
||||
meterSN3 = ReadParameterFromMemory(SERIES_BASE+2*SENSOR_SN_WIDTH ,SENSOR_SN_WIDTH ,0);
|
||||
meterSN4 = ReadParameterFromMemory(SERIES_BASE+3*SENSOR_SN_WIDTH ,SENSOR_SN_WIDTH ,0);
|
||||
meterSN5 = ReadParameterFromMemory(SERIES_BASE+4*SENSOR_SN_WIDTH ,SENSOR_SN_WIDTH ,0);
|
||||
meterSN6 = ReadParameterFromMemory(SERIES_BASE+5*SENSOR_SN_WIDTH ,SENSOR_SN_WIDTH ,0);
|
||||
//==============================================================================
|
||||
// for meter factor
|
||||
MeterFactor = ReadParameterFromMemory(METER_FACTOR, METER_FACTOR_WIDTH, METER_PARAMETER_DEFAULT);
|
||||
// for GDCF
|
||||
GCFCoefA = (s32)ReadParameterFromMemory(GCF_A, GCF_A_WIDTH, (u32)GCF_A_DEFAULT);
|
||||
GDCFactor = (u16)ReadParameterFromMemory(GCF_B, GCF_B_WIDTH, GCF_DEFAULT);
|
||||
GCFCoefC = (s32)ReadParameterFromMemory(GCF_C, GCF_C_WIDTH, GCF_C_DEFAULT);
|
||||
ComputeGCFFactor();
|
||||
|
||||
clear_WDT();
|
||||
//offset Air & Gas
|
||||
offsetAir = ReadParameterFromMemory(OFFSET_AIR ,OFFSET_AIR_WIDTH ,32768);
|
||||
offsetGas = ReadParameterFromMemory(OFFSET_GAS ,OFFSET_GAS_WIDTH ,32768);
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
InternalShortParameterInit();
|
||||
InternalLongParameterInit();
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
offsetGCFX = (u16)ReadParameterFromMemory(OFFSET_GCFX, OFFSET_GCFX_WIDTH, 32768);
|
||||
// <20>ȶ<EFBFBD>ȡ<EFBFBD>¶ȣ<C2B6><C8A3>ж<EFBFBD>ģʽ
|
||||
ManagePrimaryTimeInterval();
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
Clear_WDT();
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
ReadMultiByteFromMemory(SERIES_BASE, (u8 *)&meterSN1, SERIES_DEPTH);
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
localAddress = (u16)ReadShortParameterFromMemory(SLAVER_ADDR, SLAVER_ADDR_DEFAULT);
|
||||
#ifndef ENABLE_USER_I2C
|
||||
#pragma message("[undefined] ENABLE_USER_I2C")
|
||||
#elif(ENABLE_USER_I2C)
|
||||
I2CAddr = localAddress;
|
||||
#endif
|
||||
|
||||
// for GDCF
|
||||
// GCFCoefA = (s32)ReadParameterFromEEPROM(GCF_A, GCF_A_WIDTH, (u32)GCF_A_DEFAULT);
|
||||
GDCFactor = (u16)ReadShortParameterFromMemory(GCF_B, GCF_DEFAULT);
|
||||
// GCFCoefC = (s32)ReadParameterFromEEPROM(GCF_C, GCF_C_WIDTH, GCF_C_DEFAULT);
|
||||
ComputeGCFFactor();
|
||||
|
||||
Clear_WDT();
|
||||
offsetGas = (u16)ReadShortParameterFromMemory(GAS_OFFSET, 32768);
|
||||
//------------------------------------------------------------------------------
|
||||
// offsetGCFX = (u16)ReadParameterFromEEPROM(OFFSET_GCFX, OFFSET_GCFX_WIDTH, 32768);
|
||||
//------------------------------------------------------------------------------
|
||||
factoryInterval = (u16)ReadParameterFromMemory(SAMPLE_PERIOD, SAMPLE_PERIOD_WIDTH, SAMPLE_PERIOD_DEFAULT);
|
||||
samplingInterval = factoryInterval;
|
||||
samplingTiming = SetupResponseTime(factoryInterval, SAMPLE_PERIOD_DEFAULT);
|
||||
responseTimeIndex = (u16)ReadParameterFromMemory(RESPONSE_TIME, RESPONSE_TIME_WIDTH, RESPONSE_TIME_DEFAULT);
|
||||
samplingTiming = SetupResponseTime(factoryInterval, SAMPLE_PERIOD_DEFAULT);
|
||||
|
||||
responseTimeIndex = (u16)ReadShortParameterFromMemory(RESPONSE_TIME, RESPONSE_TIME_DEFAULT);
|
||||
responseTime = SetupResponseTime(responseTimeIndex, RESPONSE_TIME_DEFAULT);
|
||||
|
||||
// for max current Loop flowrate
|
||||
maxFlowRate = ReadParameterFromMemory(MAX_FLOW, MAX_FLOW_WIDTH, MAX_FR_DEFAULT);
|
||||
minFlowRate = ReadParameterFromMemory(MIN_FLOW, MIN_FLOW_WIDTH, MIN_FR_DEFAULT); // V2004
|
||||
|
||||
// for read caluibration temperation
|
||||
calibTemperature = (u16)ReadParameterFromMemory(CALIB_TEMPERATURE, CALIB_TEMPERATURE_WIDTH, TEMPRETURE_OFFSET);
|
||||
|
||||
// read
|
||||
reverseScale = (u16)ReadParameterFromMemory(REVERSE_SCALE, REVERSE_SCALE_WIDTH, REVERSE_SCALE_DEFAULT);
|
||||
|
||||
// read display langauge unit
|
||||
language = (u8)(u16)ReadParameterFromMemory(DIS_LANGUAGE, DIS_LANGUAGE_WIDTH, (u16)DIS_LANGUAGE_DEFAULT);
|
||||
|
||||
// read zero Suppression
|
||||
zeroSuppression = (u16)ReadParameterFromMemory(ZERO_SUPPRESSION, ZERO_SUPPRESSION_WIDTH, ZERO_SUPPRESSION_DEFAULT);
|
||||
|
||||
clear_WDT();
|
||||
maxFlowRate = ReadLongParameterFromMemory(OUT_MAX_FLOW, MAX_FR_DEFAULT);
|
||||
tempL.DWord = maxFlowRate;
|
||||
maxFlowRateH = tempL.Word[1];
|
||||
maxFlowRateL = tempL.Word[0];
|
||||
|
||||
minFlowRate = ReadLongParameterFromMemory(OUT_MIN_FLOW, MIN_FR_DEFAULT); // V2004
|
||||
tempL.DWord = minFlowRate;
|
||||
minFlowRateH = tempL.Word[1];
|
||||
minFlowRateL = tempL.Word[0];
|
||||
|
||||
Clear_WDT();
|
||||
//read uart DecimalPoint
|
||||
uartDecimalPoint = (u16)ReadParameterFromMemory(COM_DECIMAL_POINT, COM_DECIMAL_POINT_WIDTH, COM_DECIMAL_POINT_DEFAULT);
|
||||
|
||||
uartDecimalPoint = (u16)ReadShortParameterFromMemory(COM_DECIMAL, COM_DECIMAL_POINT_DEFAULT);
|
||||
//============================================================================
|
||||
// for AUTO TXD DATA
|
||||
timingTxdStart = (u16)ReadParameterFromMemory(TIMING_TXD_START, TIMING_TXD_START_WIDTH, TIMING_TXD_START_DEFAULT);
|
||||
timingTxdLen = (u16)ReadParameterFromMemory(TIMING_TXD_LEN, TIMING_TXD_LEN_WIDTH, TIMING_TXD_LEN_DEFAULT);
|
||||
timingTxdTime = (u16)ReadParameterFromMemory(TIMING_TXD_TIME, TIMING_TXD_TIME_WIDTH, TIMING_TXD_TIME_DEFAULT);
|
||||
timingTxdStart = (u16)ReadShortParameterFromMemory(TIMING_TXD_START, TIMING_TXD_START_DEFAULT);
|
||||
timingTxdLen = (u16)ReadShortParameterFromMemory(TIMING_TXD_LEN, TIMING_TXD_LEN_DEFAULT);
|
||||
timingTxdTime = (u16)ReadShortParameterFromMemory(TIMING_TXD_TIME, TIMING_TXD_TIME_DEFAULT);
|
||||
|
||||
clear_WDT();
|
||||
// key setup password
|
||||
//============================================================================
|
||||
#ifndef ENABLE_KEY_FUNCTION
|
||||
#pragma message("[undefined] ENABLE_KEY_FUNCTION")
|
||||
#elif(ENABLE_KEY_FUNCTION)
|
||||
keyPassWord = ReadParameterFromMemory(KEY_PASSWORD, KEY_PASSWORD_WIDTH, KEY_PASSWORD_DEFAULT);
|
||||
keyPassWord = ReadParameterFromEEPROM(KEY_PASSWORD, KEY_PASSWORD_WIDTH, KEY_PASSWORD_DEFAULT);
|
||||
#endif
|
||||
|
||||
//============================================================================
|
||||
UnitConverterInit();
|
||||
|
||||
//============================================================================
|
||||
#ifndef ENABLE_ACCPULSE
|
||||
#pragma message("[undefined] ENABLE_ACCPULSE")
|
||||
@@ -331,32 +315,12 @@ void SystemParameterInit(void)
|
||||
PulseParameterInit();
|
||||
#endif
|
||||
|
||||
//============================================================================
|
||||
// RHCircuitParameterInit();
|
||||
|
||||
//============================================================================
|
||||
GasAnalysisParameterInit();
|
||||
|
||||
//============================================================================
|
||||
SaveParameterInit();
|
||||
|
||||
//============================================================================
|
||||
AdjustOffsetInit();
|
||||
|
||||
//============================================================================
|
||||
#ifndef ENABLE_PLUG_IN_FLOWRATE
|
||||
#pragma message("[undefined] ENABLE_PLUG_IN_FLOWRATE")
|
||||
#elif(ENABLE_PLUG_IN_FLOWRATE)
|
||||
PipeFlowRateComputeInit();
|
||||
#endif
|
||||
|
||||
//============================================================================
|
||||
#ifndef ENABLE_A_TYPE_FLOWRATE
|
||||
#pragma message("[undefined] ENABLE_A_TYPE_FLOWRATE")
|
||||
#elif(ENABLE_A_TYPE_FLOWRATE)
|
||||
ATypeFlowRateInit();
|
||||
#endif
|
||||
|
||||
|
||||
//==============================================================================
|
||||
// retrieve device coefficients
|
||||
#ifndef ENABLE_DCOEF
|
||||
@@ -381,69 +345,30 @@ void SystemParameterInit(void)
|
||||
// for modbus
|
||||
InitUseBusParameter();
|
||||
|
||||
//==============================================================================
|
||||
// for system hardware
|
||||
#ifndef ENABLE_4_20MA_OUTPUT
|
||||
#pragma message("[undefined] ENABLE_4_20MA_OUTPUT")
|
||||
#elif(ENABLE_4_20MA_OUTPUT)
|
||||
CurrentLoopInit();
|
||||
#endif
|
||||
|
||||
//==============================================================================
|
||||
#ifndef ENABLE_USE_EDM7791
|
||||
#pragma message("[undefined] ENABLE_USE_EDM7791")
|
||||
#elif(ENABLE_USE_EDM7791)
|
||||
|
||||
#ifndef ENABLE_EDM7791_ALL
|
||||
#pragma message("[undefined] ENABLE_EDM7791_ALL")
|
||||
#elif(ENABLE_EDM7791_ALL)
|
||||
SysLcd = (u16)ReadParameterFromMemory(SYS_LCD, SYS_LCD_WIDTH, SYS_LCD_DEFAULT);
|
||||
#else
|
||||
#ifndef ENABLE_EMD779103D
|
||||
#pragma message("[undefined] ENABLE_EMD779103D")
|
||||
#elif(ENABLE_EMD779103D)
|
||||
SysLcd = EDM779103D;
|
||||
#endif
|
||||
|
||||
#ifndef ENABLE_EMD779106D
|
||||
#pragma message("[undefined] ENABLE_EMD779106D")
|
||||
#elif(ENABLE_EMD779106D)
|
||||
SysLcd = EDM779106D;
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// V2004
|
||||
#ifndef ENABLE_ALARM_ACC
|
||||
#pragma message("[undefined] ENABLE_ALARM_ACC")
|
||||
#elif(ENABLE_ALARM_ACC)
|
||||
alarmAcc = ReadParameterFromMemory(ALARM_ACC, ALARM_ACC_WIDTH, ALARM_ACC_DEFAULT);
|
||||
alarmAcc = ReadParameterFromEEPROM(ALARM_ACC, ALARM_ACC_WIDTH, ALARM_ACC_DEFAULT);
|
||||
#endif
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
#ifndef ENABLE_OFFSET_CORRECT
|
||||
#pragma message("[undefined] ENABLE_OFFSET_CORRECT")
|
||||
#elif(ENABLE_OFFSET_CORRECT)
|
||||
ComputeOffsetDriftInit();
|
||||
#endif
|
||||
//----------------------------------------------------------------------------
|
||||
|
||||
#ifndef ENABLE_LEAK_DETECT
|
||||
#pragma message("[undefined] ENABLE_LEAK_DETECT")
|
||||
#elif(ENABLE_LEAK_DETECT)
|
||||
minLeakFlowRate = (u16)ReadParameterFromMemory(MIN_LEAK_FLOW, MIN_LEAK_FLOW_WIDTH, MIN_LEAK_FLOW_DEFAULT);
|
||||
maxLeakFlowRate = (u16)ReadParameterFromMemory(MAX_LEAK_FLOW, MAX_LEAK_FLOW_WIDTH, MAX_LEAK_FLOW_DEFAULT);
|
||||
leakDetectTime = (u16)ReadParameterFromMemory(LEAK_TIME, LEAK_TIME_WIDTH, LEAK_TIME_DEFAULT);
|
||||
minLeakFlowRate = (u16)ReadParameterFromEEPROM(MIN_LEAK_FLOW, MIN_LEAK_FLOW_WIDTH, MIN_LEAK_FLOW_DEFAULT);
|
||||
maxLeakFlowRate = (u16)ReadParameterFromEEPROM(MAX_LEAK_FLOW, MAX_LEAK_FLOW_WIDTH, MAX_LEAK_FLOW_DEFAULT);
|
||||
leakDetectTime = (u16)ReadParameterFromEEPROM(LEAK_TIME, LEAK_TIME_WIDTH, LEAK_TIME_DEFAULT);
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#ifndef ENABLE_FLOW_GAIN
|
||||
#pragma message("[undefined] ENABLE_FLOW_GAIN")
|
||||
#elif(ENABLE_FLOW_GAIN)
|
||||
calibFlowGain = (u16)ReadParameterFromMemory(FLOW_GAIN, FLOW_GAIN_WIDTH, FLOW_GAIN_DEFAULT);
|
||||
if(JudgeFlowRateGain(calibFlowGain)) calibFlowGain = FLOW_GAIN_DEFAULT;
|
||||
|
||||
//==============================================================================
|
||||
#ifndef REC_ACC_PER
|
||||
#pragma message("[undefined] REC_ACC_PER")
|
||||
#elif(REC_ACC_PER)
|
||||
RetrieveLastAccumulation();
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
//******************************************************************************
|
||||
@@ -494,27 +419,6 @@ void SystemHardWareAutoCheck(void)
|
||||
// }
|
||||
|
||||
// 7) Check external RTC and read current time
|
||||
//===========================================================================
|
||||
#ifndef ENABLE_EXT_RTC
|
||||
#pragma message("[undefined] ENABLE_EXT_RTC")
|
||||
#elif(ENABLE_EXT_RTC)
|
||||
if(ExtRTCDataRead(USR1) == 1) Dis1[CHK_RTC] = 0;
|
||||
else if(TestExtRTCReady())
|
||||
{
|
||||
if(ExtRTCInit())
|
||||
{
|
||||
Dis1[CHK_RTC] = 1;
|
||||
systemAlarm.Bit.RTC_ALARM = 1;
|
||||
}
|
||||
}
|
||||
else Dis1[CHK_RTC] = 2;
|
||||
|
||||
if(Dis1[CHK_RTC] == 0) ExtRTCTimeRead(); // read IS1208 time
|
||||
else ReadCurrentTime();
|
||||
|
||||
#else
|
||||
// ReadCurrentTime();
|
||||
#endif
|
||||
//FY SetRTCCurrentTime(); // set time to MCU RTC
|
||||
|
||||
// 7)Check external temprature
|
||||
@@ -535,28 +439,19 @@ void SystemHardWareInit(void)
|
||||
/*SPI Bus Init=========================================================================*/
|
||||
//TurnOffAnalogCircuit();
|
||||
/*IIC Bus Init=========================================================================*/
|
||||
SI2C_Init();
|
||||
// SI2C_Init();
|
||||
|
||||
/*Memory Init==========================================================================*/
|
||||
EEPROMInit();
|
||||
|
||||
//if(REC_ACC_PER) FRAMInit();// Acc flowrate save enable bit
|
||||
/*external tempreture Init============================================================*/
|
||||
HWState.EnableTempTest= 1;
|
||||
HWState.EnableTempInit=1;
|
||||
WriteWordRegister(CONFIG, SHUT_DOWN);//<2F><><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
|
||||
/*RTC Init=============================================================================*/
|
||||
//FY SetRTCCalendarMode();
|
||||
/*External RTC=========================================================================*/
|
||||
#ifndef ENABLE_EXT_RTC
|
||||
#pragma message("[undefined] ENABLE_EXT_RTC")
|
||||
#elif(ENABLE_EXT_RTC)
|
||||
if(TestExtRTCReady()) ExtRTCInit();
|
||||
#endif
|
||||
// HWState.EnableTempTest= 1;
|
||||
// HWState.EnableTempInit=1;
|
||||
// WriteWordRegister(CONFIG, SHUT_DOWN);//<2F><><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
|
||||
}
|
||||
|
||||
//******************************************************************************
|
||||
|
||||
|
||||
|
||||
void SystemInterfaceInit(void)
|
||||
{
|
||||
//uart init============================================================================
|
||||
@@ -566,25 +461,24 @@ void SystemInterfaceInit(void)
|
||||
MainUartInit(baudRateVaule[baudRate]);
|
||||
StartDMAForRxdMainUartData();
|
||||
#endif
|
||||
|
||||
//iic init============================================================================
|
||||
// #ifndef ENABLE_USER_I2C
|
||||
// #pragma message("[undefined] ENABLE_USER_I2C")
|
||||
// #elif(ENABLE_USER_I2C)
|
||||
// I2C_Slave_Init(100000 , 0x02);
|
||||
// I2CAddr = localAddress;
|
||||
// meterSN1=0x3031; meterSN2=0x3233; meterSN3=0x3435;
|
||||
// meterSN4=0x3637; meterSN5=0x3839; meterSN6=0x4041;
|
||||
// #endif
|
||||
#ifndef ENABLE_USER_I2C
|
||||
#pragma message("[undefined] ENABLE_USER_I2C")
|
||||
#elif(ENABLE_USER_I2C)
|
||||
I2C_Slave_Init(100000 , 0x02);
|
||||
I2CAddr = localAddress;
|
||||
#endif
|
||||
}
|
||||
|
||||
//******************************************************************************
|
||||
void InitGlobalVar(void)
|
||||
void InitGlobalVar(void)
|
||||
{
|
||||
u8 I;
|
||||
|
||||
jumpError = 0;
|
||||
|
||||
clear_WDT();
|
||||
Clear_WDT();
|
||||
//TXDMode = ENABLE_TXD_USE_DMA;
|
||||
|
||||
displayUpdate = 0;
|
||||
@@ -610,21 +504,14 @@ void InitGlobalVar(void)
|
||||
// 0x80~0xf0
|
||||
protocol = 0;
|
||||
localAddress = 1;
|
||||
baudRate = BPS_115200;
|
||||
minFlowRate = 0;
|
||||
maxFlowRate = 0;
|
||||
baudRate = BPS_38400; // BPS_9600 BPS_115200
|
||||
minAnalogOutput = 0;
|
||||
maxAnalogOutput = 0;
|
||||
GDCFactor = 0;
|
||||
GDCFactorAType = 0;
|
||||
filterTime = 0;
|
||||
factoryInterval = 0;
|
||||
offsetGas = 0;
|
||||
offsetGasA = 0;
|
||||
flowUnit = 0;
|
||||
VHHParameterAir = 0;
|
||||
VHHParameterScale = 0;
|
||||
unitPerPulse = 0;
|
||||
alarmFunction = 0;
|
||||
alarmOutDelay = 0;
|
||||
alarmAcc = 0;
|
||||
@@ -651,48 +538,21 @@ void InitGlobalVar(void)
|
||||
densityFSParameter = 0;
|
||||
#endif
|
||||
|
||||
displayMode.NeedForInit = 1;
|
||||
|
||||
munWriteParams = WP_NOT;//<2F><>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>Ҫд<D2AA><D0B4>
|
||||
displayMode.NeedForInit = 1;
|
||||
}
|
||||
|
||||
/*******************************************************************************/
|
||||
void SystemInitProcess(void)
|
||||
{
|
||||
if(systmeState != 0xAA55)
|
||||
{
|
||||
if(CodeCRC == 0) alarmState &= ~BL_CRC_ERROR;
|
||||
else alarmState |= BL_CRC_ERROR;
|
||||
InitGlobalVar();
|
||||
}
|
||||
SystemHardWareInit(); //ϵͳӲ<CDB3><D3B2><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
|
||||
SystemHardWareAutoCheck();
|
||||
SystemParameterInit(); //ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
|
||||
SystemInterfaceInit(); //ϵͳ<CFB5>ӿڳ<D3BF>ʼ<EFBFBD><CABC> //USER_UART
|
||||
InitGlobalVar(); //ȫ<>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
|
||||
SystemHardWareInit(); //ϵͳӲ<CDB3><D3B2><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
|
||||
SystemHardWareAutoCheck(); //
|
||||
SystemParameterInit(); //ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
|
||||
SystemInterfaceInit(); //ϵͳ<CFB5>ӿڳ<D3BF>ʼ<EFBFBD><CABC> //USER_UART
|
||||
systmeState = 0xAA55;
|
||||
}
|
||||
|
||||
|
||||
|
||||
u32 sleeptime ;
|
||||
void LPTIMER1_IRQ_Callback()//
|
||||
{
|
||||
StartNormolFlowMeasurement();//ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>źŵIJ<C5B5><C4B2><EFBFBD>
|
||||
// LHL_GPIO_TogglePin(pGPIO1, GPIO_PIN_7);
|
||||
|
||||
// sleeptime++;
|
||||
// if (sleeptime == 40){ mcuModeSleeping = 1 ; }
|
||||
}
|
||||
|
||||
|
||||
|
||||
//******************************************************************************
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
void EnterMainEntry(void)
|
||||
{
|
||||
samplingInterval = 0;
|
||||
StartPrimaryTimerInterval(TimeVaule[samplingInterval]);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
lptimer_register_irq_callback(PrimaryTimer,LPTIMER1_IRQ_Callback);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -43,17 +43,18 @@ typedef union
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u16 ExtPowerInput: 1; // 0
|
||||
u16 FactoryTestMode: 1; // 1
|
||||
u16 ZeroCalib: 1; // 2
|
||||
u16 CalibMode: 1; // 3
|
||||
u16 DebugMode: 1; // 4
|
||||
u16 TurnOffSystem: 1; // 5
|
||||
u16 ComModeOperate: 1; // 6
|
||||
u16 DigitOutput: 1; // 7
|
||||
u16 IntCalibMode: 1; // 8
|
||||
u16 LowCalibEnd : 1; // 9
|
||||
u16 HighCalibEnd : 1; // 10
|
||||
u16 ExtPowerInput: 1; // 0 <20>ⲿ<EFBFBD><E2B2BF>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>
|
||||
u16 FactoryTestMode: 1; // 1 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
u16 ZeroCalib: 1; // 2 <20><><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD><DFB5>±궨ģʽ
|
||||
u16 CalibMode: 1; // 3 Уģʽ
|
||||
u16 DebugMode: 1; // 4 <20><><EFBFBD><EFBFBD>ģʽ
|
||||
u16 TurnOffSystem: 1; // 5 <20>ر<EFBFBD>ϵͳ
|
||||
u16 ComModeOperate: 1; // 6 <20><><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD>ģʽ
|
||||
u16 DigitOutput: 1; // 7 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
u16 IntCalibMode: 1; // 8 <20>ڲ<EFBFBD><DAB2>궨ģʽ
|
||||
u16 LowCalibEnd : 1; // 9 <20><><EFBFBD>±궨<C2B1><EAB6A8><EFBFBD>ɱ<EFBFBD>־
|
||||
u16 HighCalibEnd : 1; // 10 <20><><EFBFBD>±궨<C2B1><EAB6A8><EFBFBD>ɱ<EFBFBD>־
|
||||
u16 PreCalibEnd : 1; // 11 Уǰ<D7BC><C7B0><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><C8B2><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD>ɱ<EFBFBD>־
|
||||
} __System_Status_Bit_TypeDef;
|
||||
|
||||
typedef union
|
||||
@@ -65,9 +66,9 @@ typedef union
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u16 ZeroCalib: 1; // 2
|
||||
u16 CalibMode: 1; // 3
|
||||
u16 DebugMode: 1; // 4
|
||||
u16 ZeroCalib: 1; // 0
|
||||
u16 DebugMode: 1; // 1
|
||||
u16 CalibMode: 1; // 2
|
||||
} __HW_Switch_BIT_TypeDef;
|
||||
|
||||
typedef union
|
||||
@@ -92,8 +93,9 @@ typedef struct
|
||||
u16 EnableTempInit: 1; // 10
|
||||
u16 KeyPressed: 1; // 11
|
||||
u16 PulseOperate: 1; // 12
|
||||
u16 ReadParameterOK: 1; // 13
|
||||
|
||||
u16 ReadParameterOK: 1; // 13
|
||||
u16 MainTimerOut: 1; // 13
|
||||
u16 ProcessTimerOut: 1; // 13
|
||||
} __Hardware_Status_Bit_TypeDef;
|
||||
|
||||
typedef struct
|
||||
@@ -105,7 +107,7 @@ typedef struct
|
||||
u16 NeedForInit: 1; // 4
|
||||
|
||||
} __Display_Status_Bit_TypeDef;
|
||||
|
||||
|
||||
//**********************************************************************************************
|
||||
//extern u16 MAPBuffer1,MAPBuffer2,MAPBuffer3,MAPBuffer4,MAPBuffer5,MAPBuffer6,MAPBuffer7,MAPBuffer8;
|
||||
//extern u16 MAPBuffer9,MAPBuffer10,MAPBuffer11,MAPBuffer12,MAPBuffer13,MAPBuffer14,MAPBuffer15,MAPBuffer16;
|
||||
@@ -169,29 +171,28 @@ extern u16 jumpError ;
|
||||
|
||||
//**********************************************************************************************
|
||||
extern __Hardware_Status_Bit_TypeDef HWState;
|
||||
extern __SystemProcess_Union_TypeDef systemProcess;
|
||||
extern __SystemProcess_Union_TypeDef systemProcessing;
|
||||
extern __SystemState_Union_TypeDef currentMode;
|
||||
extern __Alarm_State_TypeDef systemAlarm;
|
||||
//----------------------------------------------------------------------------------------------
|
||||
extern u32 securityID;
|
||||
extern u16 IDvalidTime, comCounter, comResetCounter, AutoOffsetCounter, timePeriod, autoTxdCounter, SysVolErrorCount;
|
||||
extern u16 IDvalidTime, comCounter, AutoOffsetCounter, timePeriod, autoTxdCounter, SysVolErrorCount;
|
||||
extern u16 calibType;
|
||||
extern u16 curveMode;
|
||||
//----------------------------------------------------------------------------------------------
|
||||
extern u8 Dis1[15], timer[8];
|
||||
extern u16 language,displayCNT;
|
||||
extern u16 displayCNT;
|
||||
extern __Display_Status_Bit_TypeDef displayMode;
|
||||
//----------------------------------------------------------------------------------------------
|
||||
extern u32 unitPerPulse;
|
||||
//extern u32 unitPerPulse;
|
||||
//----------------------------------------------------------------------------------------------
|
||||
// for flowrate
|
||||
extern u16 displayUpdate;
|
||||
extern u16 reverseScale, zeroSuppression, calibFlowGain;
|
||||
extern u32 currentFlowRate;
|
||||
|
||||
extern u16 samplingInterval, factoryInterval, responseTimeIndex, samplingIntervalTarget;
|
||||
extern u16 samplingInterval, responseTimeIndex, samplingIntervalTarget;
|
||||
extern u16 systemVoltage, batteryGrid;
|
||||
extern u16 calibTemperature;
|
||||
//extern u16 calibTemperature;
|
||||
//**********************************************************************************************
|
||||
extern u16 tmpIA;
|
||||
extern s32 tmpSLA, tmpSLB;
|
||||
@@ -214,20 +215,18 @@ extern const u16 UpdateTimeVaule[]; // 0.235s, 0.45s, 0.5s, 1s, 2s
|
||||
extern const u16 FRUnitForHour[];
|
||||
extern const u16 FRUnitForMinute[];
|
||||
//**********************************************************************************************
|
||||
extern void SetDisplayUpdateTime(void);
|
||||
extern void DisableDisplayTimerInterrupt(void);
|
||||
extern void ReadCurrentTime(void);
|
||||
//extern void SetDisplayUpdateTime(void);
|
||||
//extern void DisableDisplayTimerInterrupt(void);
|
||||
//extern void ReadCurrentTime(void);
|
||||
|
||||
void ManagePrimaryProcess(void);
|
||||
void ManageRTCProcess(void);
|
||||
void EnterUserMode(void);
|
||||
void EnterCalibMode(void);
|
||||
void EnterZeroCalibMode(void);
|
||||
void EnterBatteryMode(void);
|
||||
void EnterDebugMode(void);
|
||||
void EnterGcfTestMode(void);
|
||||
void ManagePrimaryTimeInterval(void);
|
||||
void ModeExitCount(void);
|
||||
void ManagePrimaryTimeInterval(void);
|
||||
void EnterMainEntry(void);
|
||||
void BackupParameterToFlash(void);
|
||||
void SystemParameterInit(void);
|
||||
@@ -236,9 +235,6 @@ void SystemHardWareInit(void);
|
||||
void SystemInterfaceInit(void);
|
||||
void InitGlobalVar(void);
|
||||
void SystemInitProcess(void);
|
||||
void SystemPolling(void);
|
||||
void SetPriority(void);
|
||||
|
||||
|
||||
u32 ReadParameterFromMemory(u16 parameterAdr, u16 parameterLen, u32 parameterDefault);
|
||||
#endif
|
||||
613
user/Main/StorageDefine.h
Normal file
613
user/Main/StorageDefine.h
Normal file
@@ -0,0 +1,613 @@
|
||||
#ifndef __StorageDefine_h__
|
||||
#define __StorageDefine_h__
|
||||
|
||||
//==============================================================================
|
||||
// for system Command Cache: 0x08,0x09
|
||||
#define ZEROCAL_STATE 0x08
|
||||
#define ZEROCAL_STATE_WIDTH 2
|
||||
#define ZEROCAL_STATE_CRC (SYS_COMMAND_WIDTH-1)
|
||||
|
||||
// for system Command Cache: 0x0A, 0x0B
|
||||
#define SYS_COMMAND 0x0A
|
||||
#define SYS_COMMAND_WIDTH 2
|
||||
#define SYS_COMMAND_CRC (SYS_COMMAND_WIDTH-1)
|
||||
//==============================================================================
|
||||
// Internal EEPROM definition (for EEPROM)
|
||||
// for all parameter save: lowest bit first
|
||||
#define PARAMETER_BASE 0x0D // 13
|
||||
//------------------------------------------------------------------------------
|
||||
#define UPGRADE_APP PARAMETER_BASE // 13
|
||||
#define UPGRADE_APP_WIDTH 3
|
||||
#define UPGRADE_APP_CRC (UPGRADE_APP_WIDTH-1)
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//#define SERIES_BASE 0x0E //(SENSOR_SN_BASE + SENSOR_SN_DEPTH) //
|
||||
//#define SERIES_DEPTH 12
|
||||
//------------------------------------------------------------------------------
|
||||
// for MODBUS Parameter save
|
||||
// All data is saved using a 16-bit storage method
|
||||
#define REG_MEMORY_ADDR 0x10
|
||||
#define REG_WORD_WIDTH 3
|
||||
#define REG_WORD_CRC (REG_WORD_WIDTH-1)
|
||||
|
||||
//#define MEM_ADDR_REG_START MEM_ADDR_REG_0X30
|
||||
//#define MEM_REG_START 0X30
|
||||
#define MEM_ADDR_REG_0X30 REG_MEMORY_ADDR
|
||||
#define MEM_ADDR_REG_0X31 ( MEM_ADDR_REG_0X30 + ( 0X31 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X32 ( MEM_ADDR_REG_0X30 + ( 0X32 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X33 ( MEM_ADDR_REG_0X30 + ( 0X33 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X34 ( MEM_ADDR_REG_0X30 + ( 0X34 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X35 ( MEM_ADDR_REG_0X30 + ( 0X35 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X36 ( MEM_ADDR_REG_0X30 + ( 0X36 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X37 ( MEM_ADDR_REG_0X30 + ( 0X37 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X38 ( MEM_ADDR_REG_0X30 + ( 0X38 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X39 ( MEM_ADDR_REG_0X30 + ( 0X39 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X3A ( MEM_ADDR_REG_0X30 + ( 0X3A - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X3B ( MEM_ADDR_REG_0X30 + ( 0X3B - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X3C ( MEM_ADDR_REG_0X30 + ( 0X3C - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X3D ( MEM_ADDR_REG_0X30 + ( 0X3D - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X3E ( MEM_ADDR_REG_0X30 + ( 0X3E - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X3F ( MEM_ADDR_REG_0X30 + ( 0X3F - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X40 ( MEM_ADDR_REG_0X30 + ( 0X40 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X41 ( MEM_ADDR_REG_0X30 + ( 0X41 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X42 ( MEM_ADDR_REG_0X30 + ( 0X42 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X43 ( MEM_ADDR_REG_0X30 + ( 0X43 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X44 ( MEM_ADDR_REG_0X30 + ( 0X44 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X45 ( MEM_ADDR_REG_0X30 + ( 0X45 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X46 ( MEM_ADDR_REG_0X30 + ( 0X46 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X47 ( MEM_ADDR_REG_0X30 + ( 0X47 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X48 ( MEM_ADDR_REG_0X30 + ( 0X48 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X49 ( MEM_ADDR_REG_0X30 + ( 0X49 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X4A ( MEM_ADDR_REG_0X30 + ( 0X4A - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X4B ( MEM_ADDR_REG_0X30 + ( 0X4B - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X4C ( MEM_ADDR_REG_0X30 + ( 0X4C - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X4D ( MEM_ADDR_REG_0X30 + ( 0X4D - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X4E ( MEM_ADDR_REG_0X30 + ( 0X4E - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X4F ( MEM_ADDR_REG_0X30 + ( 0X4F - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X50 ( MEM_ADDR_REG_0X30 + ( 0X50 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X51 ( MEM_ADDR_REG_0X30 + ( 0X51 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X52 ( MEM_ADDR_REG_0X30 + ( 0X52 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X53 ( MEM_ADDR_REG_0X30 + ( 0X53 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X54 ( MEM_ADDR_REG_0X30 + ( 0X54 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X55 ( MEM_ADDR_REG_0X30 + ( 0X55 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X56 ( MEM_ADDR_REG_0X30 + ( 0X56 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X57 ( MEM_ADDR_REG_0X30 + ( 0X57 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X58 ( MEM_ADDR_REG_0X30 + ( 0X58 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X59 ( MEM_ADDR_REG_0X30 + ( 0X59 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X5A ( MEM_ADDR_REG_0X30 + ( 0X5A - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X5B ( MEM_ADDR_REG_0X30 + ( 0X5B - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X5C ( MEM_ADDR_REG_0X30 + ( 0X5C - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X5D ( MEM_ADDR_REG_0X30 + ( 0X5D - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X5E ( MEM_ADDR_REG_0X30 + ( 0X5E - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X5F ( MEM_ADDR_REG_0X30 + ( 0X5F - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X60 ( MEM_ADDR_REG_0X30 + ( 0X60 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X61 ( MEM_ADDR_REG_0X30 + ( 0X61 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X62 ( MEM_ADDR_REG_0X30 + ( 0X62 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X63 ( MEM_ADDR_REG_0X30 + ( 0X63 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X64 ( MEM_ADDR_REG_0X30 + ( 0X64 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X65 ( MEM_ADDR_REG_0X30 + ( 0X65 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X66 ( MEM_ADDR_REG_0X30 + ( 0X66 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X67 ( MEM_ADDR_REG_0X30 + ( 0X67 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X68 ( MEM_ADDR_REG_0X30 + ( 0X68 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X69 ( MEM_ADDR_REG_0X30 + ( 0X69 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X6A ( MEM_ADDR_REG_0X30 + ( 0X6A - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X6B ( MEM_ADDR_REG_0X30 + ( 0X6B - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X6C ( MEM_ADDR_REG_0X30 + ( 0X6C - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X6D ( MEM_ADDR_REG_0X30 + ( 0X6D - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X6E ( MEM_ADDR_REG_0X30 + ( 0X6E - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X6F ( MEM_ADDR_REG_0X30 + ( 0X6F - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X70 ( MEM_ADDR_REG_0X30 + ( 0X70 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X71 ( MEM_ADDR_REG_0X30 + ( 0X71 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X72 ( MEM_ADDR_REG_0X30 + ( 0X72 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X73 ( MEM_ADDR_REG_0X30 + ( 0X73 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X74 ( MEM_ADDR_REG_0X30 + ( 0X74 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X75 ( MEM_ADDR_REG_0X30 + ( 0X75 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X76 ( MEM_ADDR_REG_0X30 + ( 0X76 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X77 ( MEM_ADDR_REG_0X30 + ( 0X77 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X78 ( MEM_ADDR_REG_0X30 + ( 0X78 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X79 ( MEM_ADDR_REG_0X30 + ( 0X79 - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X7A ( MEM_ADDR_REG_0X30 + ( 0X7A - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X7B ( MEM_ADDR_REG_0X30 + ( 0X7B - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X7C ( MEM_ADDR_REG_0X30 + ( 0X7C - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X7D ( MEM_ADDR_REG_0X30 + ( 0X7D - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X7E ( MEM_ADDR_REG_0X30 + ( 0X7E - 0X30 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X7F ( MEM_ADDR_REG_0X30 + ( 0X7F - 0X30 ) * REG_WORD_WIDTH )
|
||||
|
||||
#define MEM_ADDR_REG_0X80 ( MEM_ADDR_REG_0X7F + REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X81 ( MEM_ADDR_REG_0X80 + ( 0X81 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X82 ( MEM_ADDR_REG_0X80 + ( 0X82 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X83 ( MEM_ADDR_REG_0X80 + ( 0X83 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X84 ( MEM_ADDR_REG_0X80 + ( 0X84 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X85 ( MEM_ADDR_REG_0X80 + ( 0X85 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X86 ( MEM_ADDR_REG_0X80 + ( 0X86 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X87 ( MEM_ADDR_REG_0X80 + ( 0X87 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X88 ( MEM_ADDR_REG_0X80 + ( 0X88 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X89 ( MEM_ADDR_REG_0X80 + ( 0X89 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8A ( MEM_ADDR_REG_0X80 + ( 0X8A - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8B ( MEM_ADDR_REG_0X80 + ( 0X8B - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8C ( MEM_ADDR_REG_0X80 + ( 0X8C - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8D ( MEM_ADDR_REG_0X80 + ( 0X8D - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8E ( MEM_ADDR_REG_0X80 + ( 0X8E - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8F ( MEM_ADDR_REG_0X80 + ( 0X8F - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X90 ( MEM_ADDR_REG_0X80 + ( 0X90 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X91 ( MEM_ADDR_REG_0X80 + ( 0X91 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X92 ( MEM_ADDR_REG_0X80 + ( 0X92 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X93 ( MEM_ADDR_REG_0X80 + ( 0X93 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X94 ( MEM_ADDR_REG_0X80 + ( 0X94 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X95 ( MEM_ADDR_REG_0X80 + ( 0X95 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X96 ( MEM_ADDR_REG_0X80 + ( 0X96 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X97 ( MEM_ADDR_REG_0X80 + ( 0X97 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X98 ( MEM_ADDR_REG_0X80 + ( 0X98 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X99 ( MEM_ADDR_REG_0X80 + ( 0X99 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X9A ( MEM_ADDR_REG_0X80 + ( 0X9A - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X9B ( MEM_ADDR_REG_0X80 + ( 0X9B - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X9C ( MEM_ADDR_REG_0X80 + ( 0X9C - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X9D ( MEM_ADDR_REG_0X80 + ( 0X9D - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X9E ( MEM_ADDR_REG_0X80 + ( 0X9E - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X9F ( MEM_ADDR_REG_0X80 + ( 0X9F - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XA0 ( MEM_ADDR_REG_0X80 + ( 0XA0 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XA1 ( MEM_ADDR_REG_0X80 + ( 0XA1 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XA2 ( MEM_ADDR_REG_0X80 + ( 0XA2 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XA3 ( MEM_ADDR_REG_0X80 + ( 0XA3 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XA4 ( MEM_ADDR_REG_0X80 + ( 0XA4 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XA5 ( MEM_ADDR_REG_0X80 + ( 0XA5 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XA6 ( MEM_ADDR_REG_0X80 + ( 0XA6 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XA7 ( MEM_ADDR_REG_0X80 + ( 0XA7 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XA8 ( MEM_ADDR_REG_0X80 + ( 0XA8 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XA9 ( MEM_ADDR_REG_0X80 + ( 0XA9 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XAA ( MEM_ADDR_REG_0X80 + ( 0XAA - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XAB ( MEM_ADDR_REG_0X80 + ( 0XAB - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XAC ( MEM_ADDR_REG_0X80 + ( 0XAC - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XAD ( MEM_ADDR_REG_0X80 + ( 0XAD - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XAE ( MEM_ADDR_REG_0X80 + ( 0XAE - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XAF ( MEM_ADDR_REG_0X80 + ( 0XAF - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XB0 ( MEM_ADDR_REG_0X80 + ( 0XB0 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XB1 ( MEM_ADDR_REG_0X80 + ( 0XB1 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XB2 ( MEM_ADDR_REG_0X80 + ( 0XB2 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XB3 ( MEM_ADDR_REG_0X80 + ( 0XB3 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XB4 ( MEM_ADDR_REG_0X80 + ( 0XB4 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XB5 ( MEM_ADDR_REG_0X80 + ( 0XB5 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XB6 ( MEM_ADDR_REG_0X80 + ( 0XB6 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XB7 ( MEM_ADDR_REG_0X80 + ( 0XB7 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XB8 ( MEM_ADDR_REG_0X80 + ( 0XB8 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XB9 ( MEM_ADDR_REG_0X80 + ( 0XB9 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XBA ( MEM_ADDR_REG_0X80 + ( 0XBA - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XBB ( MEM_ADDR_REG_0X80 + ( 0XBB - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XBC ( MEM_ADDR_REG_0X80 + ( 0XBC - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XBD ( MEM_ADDR_REG_0X80 + ( 0XBD - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XBE ( MEM_ADDR_REG_0X80 + ( 0XBE - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XBF ( MEM_ADDR_REG_0X80 + ( 0XBF - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XC0 ( MEM_ADDR_REG_0X80 + ( 0XC0 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XC1 ( MEM_ADDR_REG_0X80 + ( 0XC1 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XC2 ( MEM_ADDR_REG_0X80 + ( 0XC2 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XC3 ( MEM_ADDR_REG_0X80 + ( 0XC3 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XC4 ( MEM_ADDR_REG_0X80 + ( 0XC4 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XC5 ( MEM_ADDR_REG_0X80 + ( 0XC5 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XC6 ( MEM_ADDR_REG_0X80 + ( 0XC6 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XC7 ( MEM_ADDR_REG_0X80 + ( 0XC7 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XC8 ( MEM_ADDR_REG_0X80 + ( 0XC8 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XC9 ( MEM_ADDR_REG_0X80 + ( 0XC9 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XCA ( MEM_ADDR_REG_0X80 + ( 0XCA - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XCB ( MEM_ADDR_REG_0X80 + ( 0XCB - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XCC ( MEM_ADDR_REG_0X80 + ( 0XCC - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XCD ( MEM_ADDR_REG_0X80 + ( 0XCD - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XCE ( MEM_ADDR_REG_0X80 + ( 0XCE - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XCF ( MEM_ADDR_REG_0X80 + ( 0XCF - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XD0 ( MEM_ADDR_REG_0X80 + ( 0XD0 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XD1 ( MEM_ADDR_REG_0X80 + ( 0XD1 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XD2 ( MEM_ADDR_REG_0X80 + ( 0XD2 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XD3 ( MEM_ADDR_REG_0X80 + ( 0XD3 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XD4 ( MEM_ADDR_REG_0X80 + ( 0XD4 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XD5 ( MEM_ADDR_REG_0X80 + ( 0XD5 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XD6 ( MEM_ADDR_REG_0X80 + ( 0XD6 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XD7 ( MEM_ADDR_REG_0X80 + ( 0XD7 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XD8 ( MEM_ADDR_REG_0X80 + ( 0XD8 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XD9 ( MEM_ADDR_REG_0X80 + ( 0XD9 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XDA ( MEM_ADDR_REG_0X80 + ( 0XDA - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XDB ( MEM_ADDR_REG_0X80 + ( 0XDB - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XDC ( MEM_ADDR_REG_0X80 + ( 0XDC - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XDD ( MEM_ADDR_REG_0X80 + ( 0XDD - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XDE ( MEM_ADDR_REG_0X80 + ( 0XDE - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XDF ( MEM_ADDR_REG_0X80 + ( 0XDF - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XE0 ( MEM_ADDR_REG_0X80 + ( 0XE0 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XE1 ( MEM_ADDR_REG_0X80 + ( 0XE1 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XE2 ( MEM_ADDR_REG_0X80 + ( 0XE2 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XE3 ( MEM_ADDR_REG_0X80 + ( 0XE3 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XE4 ( MEM_ADDR_REG_0X80 + ( 0XE4 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XE5 ( MEM_ADDR_REG_0X80 + ( 0XE5 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XE6 ( MEM_ADDR_REG_0X80 + ( 0XE6 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XE7 ( MEM_ADDR_REG_0X80 + ( 0XE7 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XE8 ( MEM_ADDR_REG_0X80 + ( 0XE8 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XE9 ( MEM_ADDR_REG_0X80 + ( 0XE9 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XEA ( MEM_ADDR_REG_0X80 + ( 0XEA - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XEB ( MEM_ADDR_REG_0X80 + ( 0XEB - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XEC ( MEM_ADDR_REG_0X80 + ( 0XEC - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XED ( MEM_ADDR_REG_0X80 + ( 0XED - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XEE ( MEM_ADDR_REG_0X80 + ( 0XEE - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XEF ( MEM_ADDR_REG_0X80 + ( 0XEF - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XF0 ( MEM_ADDR_REG_0X80 + ( 0XF0 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XF1 ( MEM_ADDR_REG_0X80 + ( 0XF1 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XF2 ( MEM_ADDR_REG_0X80 + ( 0XF2 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XF3 ( MEM_ADDR_REG_0X80 + ( 0XF3 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XF4 ( MEM_ADDR_REG_0X80 + ( 0XF4 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XF5 ( MEM_ADDR_REG_0X80 + ( 0XF5 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XF6 ( MEM_ADDR_REG_0X80 + ( 0XF6 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XF7 ( MEM_ADDR_REG_0X80 + ( 0XF7 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XF8 ( MEM_ADDR_REG_0X80 + ( 0XF8 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XF9 ( MEM_ADDR_REG_0X80 + ( 0XF9 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XFA ( MEM_ADDR_REG_0X80 + ( 0XFA - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XFB ( MEM_ADDR_REG_0X80 + ( 0XFB - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XFC ( MEM_ADDR_REG_0X80 + ( 0XFC - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XFD ( MEM_ADDR_REG_0X80 + ( 0XFD - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XFE ( MEM_ADDR_REG_0X80 + ( 0XFE - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0XFF ( MEM_ADDR_REG_0X80 + ( 0XFF - 0X80 ) * REG_WORD_WIDTH )
|
||||
|
||||
#define MEM_ADDR_REG_0X100 ( MEM_ADDR_REG_0X80 + ( 0X100 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X101 ( MEM_ADDR_REG_0X80 + ( 0X101 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X102 ( MEM_ADDR_REG_0X80 + ( 0X102 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X103 ( MEM_ADDR_REG_0X80 + ( 0X103 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X104 ( MEM_ADDR_REG_0X80 + ( 0X104 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X105 ( MEM_ADDR_REG_0X80 + ( 0X105 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X106 ( MEM_ADDR_REG_0X80 + ( 0X106 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X107 ( MEM_ADDR_REG_0X80 + ( 0X107 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X108 ( MEM_ADDR_REG_0X80 + ( 0X108 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X109 ( MEM_ADDR_REG_0X80 + ( 0X109 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X10A ( MEM_ADDR_REG_0X80 + ( 0X10A - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X10B ( MEM_ADDR_REG_0X80 + ( 0X10B - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X10C ( MEM_ADDR_REG_0X80 + ( 0X10C - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X10D ( MEM_ADDR_REG_0X80 + ( 0X10D - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X10E ( MEM_ADDR_REG_0X80 + ( 0X10E - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X10F ( MEM_ADDR_REG_0X80 + ( 0X10F - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X110 ( MEM_ADDR_REG_0X80 + ( 0X110 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X111 ( MEM_ADDR_REG_0X80 + ( 0X111 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X112 ( MEM_ADDR_REG_0X80 + ( 0X112 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X113 ( MEM_ADDR_REG_0X80 + ( 0X113 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X114 ( MEM_ADDR_REG_0X80 + ( 0X114 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X115 ( MEM_ADDR_REG_0X80 + ( 0X115 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X116 ( MEM_ADDR_REG_0X80 + ( 0X116 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X117 ( MEM_ADDR_REG_0X80 + ( 0X117 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X118 ( MEM_ADDR_REG_0X80 + ( 0X118 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X119 ( MEM_ADDR_REG_0X80 + ( 0X119 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X11A ( MEM_ADDR_REG_0X80 + ( 0X11A - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X11B ( MEM_ADDR_REG_0X80 + ( 0X11B - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X11C ( MEM_ADDR_REG_0X80 + ( 0X11C - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X11D ( MEM_ADDR_REG_0X80 + ( 0X11D - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X11E ( MEM_ADDR_REG_0X80 + ( 0X11E - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X11F ( MEM_ADDR_REG_0X80 + ( 0X11F - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X120 ( MEM_ADDR_REG_0X80 + ( 0X120 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X121 ( MEM_ADDR_REG_0X80 + ( 0X121 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X122 ( MEM_ADDR_REG_0X80 + ( 0X122 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X123 ( MEM_ADDR_REG_0X80 + ( 0X123 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X124 ( MEM_ADDR_REG_0X80 + ( 0X124 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X125 ( MEM_ADDR_REG_0X80 + ( 0X125 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X126 ( MEM_ADDR_REG_0X80 + ( 0X126 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X127 ( MEM_ADDR_REG_0X80 + ( 0X127 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X128 ( MEM_ADDR_REG_0X80 + ( 0X128 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X129 ( MEM_ADDR_REG_0X80 + ( 0X129 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X12A ( MEM_ADDR_REG_0X80 + ( 0X12A - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X12B ( MEM_ADDR_REG_0X80 + ( 0X12B - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X12C ( MEM_ADDR_REG_0X80 + ( 0X12C - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X12D ( MEM_ADDR_REG_0X80 + ( 0X12D - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X12E ( MEM_ADDR_REG_0X80 + ( 0X12E - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X12F ( MEM_ADDR_REG_0X80 + ( 0X12F - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X130 ( MEM_ADDR_REG_0X80 + ( 0X130 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X131 ( MEM_ADDR_REG_0X80 + ( 0X131 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X132 ( MEM_ADDR_REG_0X80 + ( 0X132 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X133 ( MEM_ADDR_REG_0X80 + ( 0X133 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X134 ( MEM_ADDR_REG_0X80 + ( 0X134 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X135 ( MEM_ADDR_REG_0X80 + ( 0X135 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X136 ( MEM_ADDR_REG_0X80 + ( 0X136 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X137 ( MEM_ADDR_REG_0X80 + ( 0X137 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X138 ( MEM_ADDR_REG_0X80 + ( 0X138 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X139 ( MEM_ADDR_REG_0X80 + ( 0X139 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X13A ( MEM_ADDR_REG_0X80 + ( 0X13A - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X13B ( MEM_ADDR_REG_0X80 + ( 0X13B - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X13C ( MEM_ADDR_REG_0X80 + ( 0X13C - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X13D ( MEM_ADDR_REG_0X80 + ( 0X13D - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X13E ( MEM_ADDR_REG_0X80 + ( 0X13E - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X13F ( MEM_ADDR_REG_0X80 + ( 0X13F - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X140 ( MEM_ADDR_REG_0X80 + ( 0X140 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X141 ( MEM_ADDR_REG_0X80 + ( 0X141 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X142 ( MEM_ADDR_REG_0X80 + ( 0X142 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X143 ( MEM_ADDR_REG_0X80 + ( 0X143 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X144 ( MEM_ADDR_REG_0X80 + ( 0X144 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X145 ( MEM_ADDR_REG_0X80 + ( 0X145 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X146 ( MEM_ADDR_REG_0X80 + ( 0X146 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X147 ( MEM_ADDR_REG_0X80 + ( 0X147 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X148 ( MEM_ADDR_REG_0X80 + ( 0X148 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X149 ( MEM_ADDR_REG_0X80 + ( 0X149 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X14A ( MEM_ADDR_REG_0X80 + ( 0X14A - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X14B ( MEM_ADDR_REG_0X80 + ( 0X14B - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X14C ( MEM_ADDR_REG_0X80 + ( 0X14C - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X14D ( MEM_ADDR_REG_0X80 + ( 0X14D - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X14E ( MEM_ADDR_REG_0X80 + ( 0X14E - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X14F ( MEM_ADDR_REG_0X80 + ( 0X14F - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X150 ( MEM_ADDR_REG_0X80 + ( 0X150 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X151 ( MEM_ADDR_REG_0X80 + ( 0X151 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X152 ( MEM_ADDR_REG_0X80 + ( 0X152 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X153 ( MEM_ADDR_REG_0X80 + ( 0X153 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X154 ( MEM_ADDR_REG_0X80 + ( 0X154 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X155 ( MEM_ADDR_REG_0X80 + ( 0X155 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X156 ( MEM_ADDR_REG_0X80 + ( 0X156 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X157 ( MEM_ADDR_REG_0X80 + ( 0X157 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X158 ( MEM_ADDR_REG_0X80 + ( 0X158 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X159 ( MEM_ADDR_REG_0X80 + ( 0X159 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X15A ( MEM_ADDR_REG_0X80 + ( 0X15A - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X15B ( MEM_ADDR_REG_0X80 + ( 0X15B - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X15C ( MEM_ADDR_REG_0X80 + ( 0X15C - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X15D ( MEM_ADDR_REG_0X80 + ( 0X15D - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X15E ( MEM_ADDR_REG_0X80 + ( 0X15E - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X15F ( MEM_ADDR_REG_0X80 + ( 0X15F - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X160 ( MEM_ADDR_REG_0X80 + ( 0X160 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X161 ( MEM_ADDR_REG_0X80 + ( 0X161 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X162 ( MEM_ADDR_REG_0X80 + ( 0X162 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X163 ( MEM_ADDR_REG_0X80 + ( 0X163 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X164 ( MEM_ADDR_REG_0X80 + ( 0X164 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X165 ( MEM_ADDR_REG_0X80 + ( 0X165 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X166 ( MEM_ADDR_REG_0X80 + ( 0X166 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X167 ( MEM_ADDR_REG_0X80 + ( 0X167 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X168 ( MEM_ADDR_REG_0X80 + ( 0X168 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X169 ( MEM_ADDR_REG_0X80 + ( 0X169 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X16A ( MEM_ADDR_REG_0X80 + ( 0X16A - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X16B ( MEM_ADDR_REG_0X80 + ( 0X16B - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X16C ( MEM_ADDR_REG_0X80 + ( 0X16C - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X16D ( MEM_ADDR_REG_0X80 + ( 0X16D - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X16E ( MEM_ADDR_REG_0X80 + ( 0X16E - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X16F ( MEM_ADDR_REG_0X80 + ( 0X16F - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X170 ( MEM_ADDR_REG_0X80 + ( 0X170 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X171 ( MEM_ADDR_REG_0X80 + ( 0X171 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X172 ( MEM_ADDR_REG_0X80 + ( 0X172 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X173 ( MEM_ADDR_REG_0X80 + ( 0X173 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X174 ( MEM_ADDR_REG_0X80 + ( 0X174 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X175 ( MEM_ADDR_REG_0X80 + ( 0X175 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X176 ( MEM_ADDR_REG_0X80 + ( 0X176 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X177 ( MEM_ADDR_REG_0X80 + ( 0X177 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X178 ( MEM_ADDR_REG_0X80 + ( 0X178 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X179 ( MEM_ADDR_REG_0X80 + ( 0X179 - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X17A ( MEM_ADDR_REG_0X80 + ( 0X17A - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X17B ( MEM_ADDR_REG_0X80 + ( 0X17B - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X17C ( MEM_ADDR_REG_0X80 + ( 0X17C - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X17D ( MEM_ADDR_REG_0X80 + ( 0X17D - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X17E ( MEM_ADDR_REG_0X80 + ( 0X17E - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X17F ( MEM_ADDR_REG_0X80 + ( 0X17F - 0X80 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_USER_REG_END ( MEM_ADDR_REG_0X17F + REG_WORD_WIDTH)
|
||||
//--------------------------------------------------------------------------------
|
||||
#define MAP_SET1 MEM_ADDR_REG_0X100
|
||||
#define MAP_SET1_WORD REG_WORD_WIDTH
|
||||
#define REG_MEM_ADDR_END (MEM_ADDR_REG_0X17F + REG_WORD_WIDTH)
|
||||
//#define REG_WORD_MEM_MAX ((REG_MEM_ADDR_END - MEM_ADDR_REG_START)/REG_WORD_WIDTH)
|
||||
//--------------------------------------------------------------------------------
|
||||
// for Internal parameter save
|
||||
// for 16bit parameter
|
||||
// max 128
|
||||
#define MEM_ADDR_WORD_REG_START MEM_ADDR_USER_REG_END
|
||||
#define MEM_ADDR_REG_0X8210 MEM_ADDR_WORD_REG_START
|
||||
#define MEM_ADDR_REG_0X8211 ( MEM_ADDR_REG_0X8210 + ( 0X8211 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8212 ( MEM_ADDR_REG_0X8210 + ( 0X8212 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8213 ( MEM_ADDR_REG_0X8210 + ( 0X8213 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8214 ( MEM_ADDR_REG_0X8210 + ( 0X8214 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8215 ( MEM_ADDR_REG_0X8210 + ( 0X8215 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8216 ( MEM_ADDR_REG_0X8210 + ( 0X8216 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8217 ( MEM_ADDR_REG_0X8210 + ( 0X8217 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8218 ( MEM_ADDR_REG_0X8210 + ( 0X8218 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8219 ( MEM_ADDR_REG_0X8210 + ( 0X8219 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X821A ( MEM_ADDR_REG_0X8210 + ( 0X821A - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X821B ( MEM_ADDR_REG_0X8210 + ( 0X821B - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X821C ( MEM_ADDR_REG_0X8210 + ( 0X821C - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X821D ( MEM_ADDR_REG_0X8210 + ( 0X821D - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X821E ( MEM_ADDR_REG_0X8210 + ( 0X821E - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X821F ( MEM_ADDR_REG_0X8210 + ( 0X821F - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8220 ( MEM_ADDR_REG_0X8210 + ( 0X8220 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8221 ( MEM_ADDR_REG_0X8210 + ( 0X8221 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8222 ( MEM_ADDR_REG_0X8210 + ( 0X8222 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8223 ( MEM_ADDR_REG_0X8210 + ( 0X8223 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8224 ( MEM_ADDR_REG_0X8210 + ( 0X8224 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8225 ( MEM_ADDR_REG_0X8210 + ( 0X8225 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8226 ( MEM_ADDR_REG_0X8210 + ( 0X8226 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8227 ( MEM_ADDR_REG_0X8210 + ( 0X8227 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8228 ( MEM_ADDR_REG_0X8210 + ( 0X8228 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8229 ( MEM_ADDR_REG_0X8210 + ( 0X8229 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X822A ( MEM_ADDR_REG_0X8210 + ( 0X822A - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X822B ( MEM_ADDR_REG_0X8210 + ( 0X822B - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X822C ( MEM_ADDR_REG_0X8210 + ( 0X822C - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X822D ( MEM_ADDR_REG_0X8210 + ( 0X822D - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X822E ( MEM_ADDR_REG_0X8210 + ( 0X822E - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X822F ( MEM_ADDR_REG_0X8210 + ( 0X822F - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8230 ( MEM_ADDR_REG_0X8210 + ( 0X8230 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8231 ( MEM_ADDR_REG_0X8210 + ( 0X8231 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8232 ( MEM_ADDR_REG_0X8210 + ( 0X8232 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8233 ( MEM_ADDR_REG_0X8210 + ( 0X8233 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8234 ( MEM_ADDR_REG_0X8210 + ( 0X8234 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8235 ( MEM_ADDR_REG_0X8210 + ( 0X8235 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8236 ( MEM_ADDR_REG_0X8210 + ( 0X8236 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8237 ( MEM_ADDR_REG_0X8210 + ( 0X8237 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8238 ( MEM_ADDR_REG_0X8210 + ( 0X8238 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8239 ( MEM_ADDR_REG_0X8210 + ( 0X8239 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X823A ( MEM_ADDR_REG_0X8210 + ( 0X823A - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X823B ( MEM_ADDR_REG_0X8210 + ( 0X823B - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X823C ( MEM_ADDR_REG_0X8210 + ( 0X823C - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X823D ( MEM_ADDR_REG_0X8210 + ( 0X823D - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X823E ( MEM_ADDR_REG_0X8210 + ( 0X823E - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X823F ( MEM_ADDR_REG_0X8210 + ( 0X823F - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8240 ( MEM_ADDR_REG_0X8210 + ( 0X8240 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8241 ( MEM_ADDR_REG_0X8210 + ( 0X8241 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8242 ( MEM_ADDR_REG_0X8210 + ( 0X8242 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8243 ( MEM_ADDR_REG_0X8210 + ( 0X8243 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8244 ( MEM_ADDR_REG_0X8210 + ( 0X8244 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8245 ( MEM_ADDR_REG_0X8210 + ( 0X8245 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8246 ( MEM_ADDR_REG_0X8210 + ( 0X8246 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8247 ( MEM_ADDR_REG_0X8210 + ( 0X8247 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8248 ( MEM_ADDR_REG_0X8210 + ( 0X8248 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8249 ( MEM_ADDR_REG_0X8210 + ( 0X8249 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X824A ( MEM_ADDR_REG_0X8210 + ( 0X824A - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X824B ( MEM_ADDR_REG_0X8210 + ( 0X824B - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X824C ( MEM_ADDR_REG_0X8210 + ( 0X824C - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X824D ( MEM_ADDR_REG_0X8210 + ( 0X824D - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X824E ( MEM_ADDR_REG_0X8210 + ( 0X824E - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X824F ( MEM_ADDR_REG_0X8210 + ( 0X824F - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8250 ( MEM_ADDR_REG_0X8210 + ( 0X8250 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8251 ( MEM_ADDR_REG_0X8210 + ( 0X8251 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8252 ( MEM_ADDR_REG_0X8210 + ( 0X8252 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8253 ( MEM_ADDR_REG_0X8210 + ( 0X8253 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8254 ( MEM_ADDR_REG_0X8210 + ( 0X8254 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8255 ( MEM_ADDR_REG_0X8210 + ( 0X8255 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8256 ( MEM_ADDR_REG_0X8210 + ( 0X8256 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8257 ( MEM_ADDR_REG_0X8210 + ( 0X8257 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8258 ( MEM_ADDR_REG_0X8210 + ( 0X8258 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8259 ( MEM_ADDR_REG_0X8210 + ( 0X8259 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X825A ( MEM_ADDR_REG_0X8210 + ( 0X825A - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X825B ( MEM_ADDR_REG_0X8210 + ( 0X825B - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X825C ( MEM_ADDR_REG_0X8210 + ( 0X825C - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X825D ( MEM_ADDR_REG_0X8210 + ( 0X825D - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X825E ( MEM_ADDR_REG_0X8210 + ( 0X825E - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X825F ( MEM_ADDR_REG_0X8210 + ( 0X825F - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8260 ( MEM_ADDR_REG_0X8210 + ( 0X8260 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8261 ( MEM_ADDR_REG_0X8210 + ( 0X8261 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8262 ( MEM_ADDR_REG_0X8210 + ( 0X8262 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8263 ( MEM_ADDR_REG_0X8210 + ( 0X8263 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8264 ( MEM_ADDR_REG_0X8210 + ( 0X8264 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8265 ( MEM_ADDR_REG_0X8210 + ( 0X8265 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8266 ( MEM_ADDR_REG_0X8210 + ( 0X8266 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8267 ( MEM_ADDR_REG_0X8210 + ( 0X8267 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8268 ( MEM_ADDR_REG_0X8210 + ( 0X8268 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8269 ( MEM_ADDR_REG_0X8210 + ( 0X8269 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X826A ( MEM_ADDR_REG_0X8210 + ( 0X826A - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X826B ( MEM_ADDR_REG_0X8210 + ( 0X826B - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X826C ( MEM_ADDR_REG_0X8210 + ( 0X826C - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X826D ( MEM_ADDR_REG_0X8210 + ( 0X826D - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X826E ( MEM_ADDR_REG_0X8210 + ( 0X826E - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X826F ( MEM_ADDR_REG_0X8210 + ( 0X826F - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8270 ( MEM_ADDR_REG_0X8210 + ( 0X8270 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8271 ( MEM_ADDR_REG_0X8210 + ( 0X8271 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8272 ( MEM_ADDR_REG_0X8210 + ( 0X8272 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8273 ( MEM_ADDR_REG_0X8210 + ( 0X8273 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8274 ( MEM_ADDR_REG_0X8210 + ( 0X8274 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8275 ( MEM_ADDR_REG_0X8210 + ( 0X8275 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8276 ( MEM_ADDR_REG_0X8210 + ( 0X8276 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8277 ( MEM_ADDR_REG_0X8210 + ( 0X8277 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8278 ( MEM_ADDR_REG_0X8210 + ( 0X8278 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X8279 ( MEM_ADDR_REG_0X8210 + ( 0X8279 - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X827A ( MEM_ADDR_REG_0X8210 + ( 0X827A - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X827B ( MEM_ADDR_REG_0X8210 + ( 0X827B - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X827C ( MEM_ADDR_REG_0X8210 + ( 0X827C - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X827D ( MEM_ADDR_REG_0X8210 + ( 0X827D - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X827E ( MEM_ADDR_REG_0X8210 + ( 0X827E - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_REG_0X827F ( MEM_ADDR_REG_0X8210 + ( 0X827F - 0X8210 ) * REG_WORD_WIDTH )
|
||||
#define MEM_ADDR_WORD_REG_END ( MEM_ADDR_REG_0X827F + REG_WORD_WIDTH)
|
||||
//#define REG_INT_WORD_MEM_MAX ((REG_INT_WORD_MEM_ADDR_END - REG_INT_WORD_MEM_ADDR_START)/REG_WORD_WIDTH)
|
||||
//--------------------------------------------------------------------------------
|
||||
// for Internal parameter save
|
||||
// for 32bit parameter
|
||||
// max 64
|
||||
#define REG_DWORD_WIDTH 5
|
||||
//#define REG_DWORD_CRC (REG_DWORD_WIDTH - 1)
|
||||
#define MEM_ADDR_DWORD_REG_START MEM_ADDR_WORD_REG_END
|
||||
#define MEM_ADDR_REG_0X8280 MEM_ADDR_WORD_REG_END
|
||||
#define MEM_ADDR_REG_0X8282 (MEM_ADDR_REG_0X8280 + ((0X8282 - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X8284 (MEM_ADDR_REG_0X8280 + ((0X8284 - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X8286 (MEM_ADDR_REG_0X8280 + ((0X8286 - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X8288 (MEM_ADDR_REG_0X8280 + ((0X8288 - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X828A (MEM_ADDR_REG_0X8280 + ((0X828A - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X828C (MEM_ADDR_REG_0X8280 + ((0X828C - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X828E (MEM_ADDR_REG_0X8280 + ((0X828E - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X8290 (MEM_ADDR_REG_0X8280 + ((0X8290 - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X8292 (MEM_ADDR_REG_0X8280 + ((0X8292 - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X8294 (MEM_ADDR_REG_0X8280 + ((0X8294 - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X8296 (MEM_ADDR_REG_0X8280 + ((0X8296 - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X8298 (MEM_ADDR_REG_0X8280 + ((0X8298 - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X829A (MEM_ADDR_REG_0X8280 + ((0X829A - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X829C (MEM_ADDR_REG_0X8280 + ((0X829C - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define MEM_ADDR_REG_0X829E (MEM_ADDR_REG_0X8280 + ((0X829E - 0X8280)>>1) * REG_DWORD_WIDTH)
|
||||
#define REG_INT_DWORD_MEM_ADDR_END (MEM_ADDR_REG_0X829E + REG_DWORD_WIDTH)
|
||||
//#define REG_INT_DWORD_MEM_MAX ((REG_INT_DWORD_MEM_ADDR_END - REG_INT_DWORD_MEM_ADDR_START)/REG_DWORD_WIDTH)
|
||||
#define PARAMETER_DEFINE_END REG_INT_DWORD_MEM_ADDR_END
|
||||
//***************************************************************************************************************************
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6>ϵ<EFBFBD><CFB5>
|
||||
//MEM_ADDR_REG_0X30 ------- INX_030
|
||||
//MEM_ADDR_REG_0X8200 ------- REG_0X8200
|
||||
//MEM_ADDR_REG_0X853F ------- REG_0X8500
|
||||
//--------------0x010->0X400 ǰ<><C7B0><EFBFBD>ֽڴ<D6BD><DAB4><EFBFBD>_<EFBFBD>û<EFBFBD><C3BB>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>Ȼ<EFBFBD><C8BB><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ0x400<30><30>ʼ<EFBFBD><CABC>
|
||||
//--------------0X400->0x580 128<32><38>u16ռ128*3=384<38>ֽ<EFBFBD>
|
||||
//--------------0X580->0x6C0 64<36><34>u32ռ64*5=320<32>ֽ<EFBFBD> 0x10+1712 byte
|
||||
|
||||
|
||||
//******************************************************************************
|
||||
#if(PARAMETER_DEFINE_END > 0x0600)
|
||||
#error The defined address is out of range: PARAMETER_DEFINE_END
|
||||
#endif
|
||||
//******************************************************************************
|
||||
// 0x0200 DCOEF define
|
||||
#define PARAMETER_BASE_0X0200 0x0600
|
||||
//#define DCOEF_NUM 0x0200 // EEPROM address for the number of intervals for device coefficients
|
||||
//#define DCOEF_NUM_WIDTH 2 // 2byte
|
||||
//#define DCOEF_NUM_CRC (DCOEF_NUM_WIDTH-1)
|
||||
|
||||
//#define DCOEF_UNIT //(DCOEF_NUM+DCOEF_NUM_WIDTH)
|
||||
//#define DCOEF_UNIT_WIDTH 2
|
||||
//#define DCOEF_UNIT_CRC (DCOEF_UNIT_WIDTH-1)
|
||||
|
||||
#define DCOEF_BASE 0x0600 // (DCOEF_UNIT+DCOEF_UNIT_WIDTH)
|
||||
#define DCOEF_DATA_WIDTH 6
|
||||
#define DCOEF_WIDTH 7 // DCOEF_WIDTH byte required for each device coefficient data
|
||||
#define DCOEF_CRC (DCOEF_WIDTH-1)
|
||||
#define DCOEF_MAX 20 // the max allowable number of intervals for for device coefficients
|
||||
|
||||
#define DCOEF_NODE_WIDTH 5
|
||||
#define DCOEF_VALUE_WIDTH 3
|
||||
#define DCOEF_DEFINE_NODE ( DCOEF_BASE + DCOEF_WIDTH * DCOEF_MAX )
|
||||
//******************************************************************************
|
||||
#if(DCOEF_DEFINE_NODE > 0X0700)
|
||||
#error The defined address is out of range: DCOEF_DEFINE_NODE
|
||||
#endif
|
||||
//******************************************************************************
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD><C2B6><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>(Ԥ<><D4A4>256<35>ֽ<EFBFBD>)
|
||||
#define TACURVE_NUM 0x700
|
||||
#define TACURVE_NUM_WIDTH 2
|
||||
#define TACURVE_NUM_CRC (TACURVE_NUM_WIDTH-1)
|
||||
|
||||
#define TACURVE_DATA_BASE (TACURVE_NUM + TACURVE_NUM_WIDTH)
|
||||
#define TACURVE_DATA_WIDTH 5
|
||||
#define TACURVE_DATA_CRC (TACURVE_DATA_WIDTH-1)
|
||||
#define CURVE_DATA_MAX 36
|
||||
//------------------------------------------------------------------------------
|
||||
// <20><><EFBFBD><EFBFBD>ԭʼ<D4AD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>(Ԥ<><D4A4>256<35>ֽ<EFBFBD>)
|
||||
#define ATYPECURVE_NUM 0x800
|
||||
#define ATYPECURVE_NUM_WIDTH 2 // 2byte
|
||||
#define ATYPECURVE_NUM_CRC (ATYPECURVE_NUM_WIDTH-1) // 2byte
|
||||
|
||||
#define ATYPECURVE_DATA_BASE (ATYPECURVE_NUM+ATYPECURVE_NUM_WIDTH)
|
||||
#define ATYPECURVE_DATA_WIDTH 5
|
||||
#define ATYPECURVE_DATA_CRC (ATYPECURVE_DATA_WIDTH-1)
|
||||
#define ATYPECURVE_DATA_END (ATYPECURVE_DATA_BASE + ATYPECURVE_DATA_WIDTH * CURVE_DATA_MAX)
|
||||
//******************************************************************************
|
||||
#if(ATYPECURVE_DATA_END > 0X0900)
|
||||
#error The defined address is out of range: ATYPECURVE_DATA_END
|
||||
#endif
|
||||
//******************************************************************************
|
||||
// <20><><EFBFBD><EFBFBD>ԭʼ<D4AD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>(Ԥ<><D4A4>256<35>ֽ<EFBFBD>)
|
||||
#define REC_ACC_BASE 0x0900 // the start EEPROM address of acc data
|
||||
#define REC_ACC_WIDTH 14 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32>
|
||||
#define REC_ACC_DEPTH 4
|
||||
#define ACC_BLOCK_WIDTH 7 // 0x100(256) + 14*4 = 0x138(312) ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>
|
||||
#define ACC_BLOCK2_START 0x0940 // 0x180(256) + 14*4 = 0x1B8
|
||||
#define REC_ACC_END (ACC_BLOCK2_START + REC_ACC_WIDTH * REC_ACC_DEPTH
|
||||
//------------------------------------------------------------------------------
|
||||
// <20><><EFBFBD><EFBFBD>ԭʼ<D4AD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>(Ԥ<><D4A4>256<35>ֽ<EFBFBD>)
|
||||
#define BASIC_DATA_BASE 0x980
|
||||
#define BASIC_DATA_MAX ANX
|
||||
#define BASIC_DATA_BYTE_MAX (BASIC_DATA_MAX*2)
|
||||
|
||||
//******************************************************************************
|
||||
// calibration data start address
|
||||
//******************************************************************************
|
||||
#define CALI_DATA_ADDR 0x1000 // for EEPROM store calibration data start addr
|
||||
//******************************************************************************
|
||||
|
||||
//==============================================================================
|
||||
// for BootLoader and upgrade programm
|
||||
//==============================================================================
|
||||
// for information flash
|
||||
#define FLASH_INFO_OFFSET 0x1800 // segment D
|
||||
//#define PARA_LEN (UPGRADE_APP_WIDTH+PROTOCOL_WIDTH+BAUD_RATE_WIDTH+SLAVER_ADDR_WIDTH)
|
||||
#define PARA_LEN (UPGRADE_APP_WIDTH+PROTOCOL_WIDTH+SLAVER_ADDR_WIDTH)
|
||||
#endif
|
||||
@@ -1,532 +0,0 @@
|
||||
#ifndef __StorageType_h__
|
||||
#define __StorageType_h__
|
||||
|
||||
//==============================================================================
|
||||
// for system Command Cache: 0x08,0x09
|
||||
#define ZEROCAL_STATE 0x08
|
||||
#define ZEROCAL_STATE_WIDTH 2
|
||||
#define ZEROCAL_STATE_CRC (SYS_COMMAND_WIDTH-1)
|
||||
|
||||
// for system Command Cache: 0x0A, 0x0B
|
||||
#define SYS_COMMAND 0x0A
|
||||
#define SYS_COMMAND_WIDTH 2
|
||||
#define SYS_COMMAND_CRC (SYS_COMMAND_WIDTH-1)
|
||||
//==============================================================================
|
||||
// Internal EEPROM definition (for EEPROM)
|
||||
// for all parameter save: lowest bit first
|
||||
#define PARAMETER_BASE 0x0D // 13
|
||||
//------------------------------------------------------------------------------
|
||||
#define UPGRADE_APP PARAMETER_BASE // 13
|
||||
#define UPGRADE_APP_WIDTH 3
|
||||
#define UPGRADE_APP_CRC (UPGRADE_APP_WIDTH-1)
|
||||
//------------------------------------------------------------------------------
|
||||
// START 0X10
|
||||
#define PROTOCOL (UPGRADE_APP + UPGRADE_APP_WIDTH) // 16
|
||||
#define PROTOCOL_WIDTH 2
|
||||
#define PROTOCOL_CRC (PROTOCOL_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define SLAVER_ADDR (PROTOCOL + PROTOCOL_WIDTH) // 18
|
||||
#define SLAVER_ADDR_WIDTH 2
|
||||
#define SLAVER_ADDR_CRC (SLAVER_ADDR_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define METER_FACTOR (SLAVER_ADDR + SLAVER_ADDR_WIDTH) // 20
|
||||
#define METER_FACTOR_WIDTH 3
|
||||
#define METER_FACTOR_CRC (METER_FACTOR_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define GDCF_FACTOR (METER_FACTOR + METER_FACTOR_WIDTH) // 23
|
||||
#define GDCF_FACTOR_WIDTH 3
|
||||
#define GDCF_FACTOR_CRC (GDCF_FACTOR_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define WORK_UNIT (GDCF_FACTOR + GDCF_FACTOR_WIDTH) // 26
|
||||
#define WORK_UNIT_WIDTH 2
|
||||
#define WORK_UNIT_CRC (WORK_UNIT_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define DIS_LANGUAGE (WORK_UNIT + WORK_UNIT_WIDTH) // 28
|
||||
#define DIS_LANGUAGE_WIDTH 2
|
||||
#define DIS_LANGUAGE_CRC (DIS_LANGUAGE_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define COM_DECIMAL_POINT (DIS_LANGUAGE + DIS_LANGUAGE_WIDTH) // 30
|
||||
#define COM_DECIMAL_POINT_WIDTH 2
|
||||
#define COM_DECIMAL_POINT_CRC (COM_DECIMAL_POINT_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define OFFSET_GAS (COM_DECIMAL_POINT + COM_DECIMAL_POINT_WIDTH) // 32
|
||||
#define OFFSET_GAS_WIDTH 3
|
||||
#define OFFSET_GAS_CRC (OFFSET_GAS_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define OFFSET_AIR (OFFSET_GAS + OFFSET_GAS_WIDTH) // 35
|
||||
#define OFFSET_AIR_WIDTH 3
|
||||
#define OFFSET_AIR_CRC (OFFSET_AIR_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define SAMPLE_PERIOD (OFFSET_AIR + OFFSET_AIR_WIDTH) // 38
|
||||
#define SAMPLE_PERIOD_WIDTH 2
|
||||
#define SAMPLE_PERIOD_CRC (SAMPLE_PERIOD_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define MAX_FLOW (SAMPLE_PERIOD + SAMPLE_PERIOD_WIDTH) // 40
|
||||
#define MAX_FLOW_WIDTH 5
|
||||
#define MAX_FLOW_CRC (MAX_FLOW_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define CALIB_TEMPERATURE (MAX_FLOW + MAX_FLOW_WIDTH) // 45
|
||||
#define CALIB_TEMPERATURE_WIDTH 3
|
||||
#define CALIB_TEMPERATURE_CRC (CALIB_TEMPERATURE_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define SENSOR_SN_BASE (CALIB_TEMPERATURE + CALIB_TEMPERATURE_WIDTH) // 48
|
||||
#define SENSOR_SN_WIDTH 2
|
||||
#define SENSOR_SN_DEPTH 6
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define SERIES_BASE (SENSOR_SN_BASE + SENSOR_SN_DEPTH) // 54
|
||||
#define SERIES_DEPTH 12
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define REVERSE_SCALE (SERIES_BASE + SERIES_DEPTH) // 66
|
||||
#define REVERSE_SCALE_WIDTH 3
|
||||
#define REVERSE_SCALE_CRC (REVERSE_SCALE_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define ZERO_SUPPRESSION (REVERSE_SCALE + REVERSE_SCALE_WIDTH) // 69
|
||||
#define ZERO_SUPPRESSION_WIDTH 3
|
||||
#define ZERO_SUPPRESSION_CRC (ZERO_SUPPRESSION_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define GCF_A (ZERO_SUPPRESSION + ZERO_SUPPRESSION_WIDTH) // 72
|
||||
#define GCF_A_WIDTH 5
|
||||
#define GCF_A_CRC (GCF_A_WIDTH-1)
|
||||
|
||||
#define GCF_B (GCF_A + GCF_A_WIDTH) // 77
|
||||
#define GCF_B_WIDTH 3
|
||||
#define GCF_B_CRC (GCF_B_WIDTH-1)
|
||||
|
||||
#define GCF_C (GCF_B + GCF_B_WIDTH) // 80
|
||||
#define GCF_C_WIDTH 5
|
||||
#define GCF_C_CRC (GCF_C_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define OFFSET_A_GAS (GCF_C + GCF_C_WIDTH) // 85
|
||||
#define OFFSET_A_GAS_WIDTH 3
|
||||
#define OFFSET_A_GAS_CRC (OFFSET_A_GAS_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define OFFSET_A_AIR (OFFSET_A_GAS + OFFSET_A_GAS_WIDTH) // 88
|
||||
#define OFFSET_A_AIR_WIDTH 3
|
||||
#define OFFSET_A_AIR_CRC (OFFSET_A_AIR_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define ATYPE_INDEX_GAIN (OFFSET_A_AIR + OFFSET_A_AIR_WIDTH) // 91
|
||||
#define ATYPE_INDEX_GAIN_WIDTH 2
|
||||
#define ATYPE_INDEX_GAIN_CRC (ATYPE_INDEX_GAIN_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define GCF_ATYPE (ATYPE_INDEX_GAIN + ATYPE_INDEX_GAIN_WIDTH) // 93
|
||||
#define GCF_ATYPE_WIDTH 3
|
||||
#define GCF_ATYPE_CRC (GCF_ATYPE_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// for memory address
|
||||
#define HISTORY_PERIOD (GCF_ATYPE + GCF_ATYPE_WIDTH)
|
||||
#define HISTORY_PERIOD_WIDTH 3
|
||||
#define HISTORY_PERIOD_CRC (HISTORY_PERIOD_WIDTH-1)
|
||||
//------------------------------------------------------------------------------
|
||||
// for Pulse.h
|
||||
#define PULSE_UNIT (HISTORY_PERIOD + HISTORY_PERIOD_WIDTH)
|
||||
#define PULSE_UNIT_WIDTH 3
|
||||
#define PULSE_UNIT_CRC (PULSE_UNIT_WIDTH-1)
|
||||
|
||||
#define PULSE_LEVEL (PULSE_UNIT + PULSE_UNIT_WIDTH)
|
||||
#define PULSE_LEVEL_WIDTH 2
|
||||
#define PULSE_LEVEL_CRC (PULSE_LEVEL_WIDTH-1)
|
||||
//------------------------------------------------------------------------------
|
||||
// for PipeFlowRate.h
|
||||
#define CALIB_DIAMETER (PULSE_LEVEL + PULSE_LEVEL_WIDTH)
|
||||
#define CALIB_DIAMETER_WIDTH 3
|
||||
#define CALIB_DIAMETER_CRC (CALIB_DIAMETER_WIDTH - 1)
|
||||
|
||||
#define WORK_DIAMETER (CALIB_DIAMETER + CALIB_DIAMETER_WIDTH)
|
||||
#define WORK_DIAMETER_WIDTH 3
|
||||
#define WORK_DIAMETER_CRC (WORK_DIAMETER_WIDTH - 1)
|
||||
//------------------------------------------------------------------------------
|
||||
// for VHHCompute.h
|
||||
#define RH_GAINRES (WORK_DIAMETER + WORK_DIAMETER_WIDTH)
|
||||
#define RH_GAINRES_WIDTH 3
|
||||
#define RH_GAINRES_CRC (RH_GAINRES_WIDTH - 1)
|
||||
|
||||
#define STATIC_LOW_TA (RH_GAINRES + RH_GAINRES_WIDTH)
|
||||
#define STATIC_LOW_TA_WIDTH 3
|
||||
#define STATIC_LOW_TA_CRC (STATIC_LOW_TA_WIDTH - 1)
|
||||
|
||||
#define STATIC_HIGH_TA (STATIC_LOW_TA + STATIC_LOW_TA_WIDTH)
|
||||
#define STATIC_HIGH_TA_WIDTH 3
|
||||
#define STATIC_HIGH_TA_CRC (STATIC_HIGH_TA_WIDTH - 1)
|
||||
//------------------------------------------------------------------------------
|
||||
// for GasAnalysis.h
|
||||
#define VHH_HIGH (STATIC_HIGH_TA + STATIC_HIGH_TA_WIDTH)
|
||||
#define VHH_HIGH_WIDTH 3
|
||||
#define VHH_HIGH_CRC (VHH_HIGH_WIDTH - 1)
|
||||
|
||||
#define VHH_ROOM (VHH_HIGH + VHH_HIGH_WIDTH)
|
||||
#define VHH_ROOM_WIDTH 3
|
||||
#define VHH_ROOM_CRC (VHH_ROOM_WIDTH - 1)
|
||||
|
||||
#define VHH_LOW (VHH_ROOM + VHH_ROOM_WIDTH)
|
||||
#define VHH_LOW_WIDTH 3
|
||||
#define VHH_LOW_CRC (VHH_ROOM_WIDTH - 1)
|
||||
|
||||
#define NRH_HIGH (VHH_LOW + VHH_LOW_WIDTH)
|
||||
#define NRH_HIGH_WIDTH 3
|
||||
#define NRH_HIGH_CRC (NRH_HIGH_WIDTH - 1)
|
||||
|
||||
#define NRH_ROOM (NRH_HIGH + NRH_HIGH_WIDTH)
|
||||
#define NRH_ROOM_WIDTH 3
|
||||
#define NRH_ROOM_CRC (NRH_ROOM_WIDTH - 1)
|
||||
|
||||
#define NRH_LOW (NRH_ROOM + NRH_ROOM_WIDTH)
|
||||
#define NRH_LOW_WIDTH 3
|
||||
#define NRH_LOW_CRC (NRH_LOE_WIDTH - 1)
|
||||
//------------------------------------------------------------------------------
|
||||
#define VHH_AIR_PARA (NRH_LOW + NRH_LOW_WIDTH)
|
||||
#define VHH_AIR_PARA_WIDTH 3
|
||||
#define VHH_AIR_PARA_CRC (VHH_AIR_PARA_WIDTH - 1)
|
||||
|
||||
#define VHH_PARA_SCALE (VHH_AIR_PARA + VHH_AIR_PARA_WIDTH)
|
||||
#define VHH_PARA_SCALE_WIDTH 3
|
||||
#define VHH_PARA_SCALE_CRC (VHH_PARA_SCALE_WIDTH - 1)
|
||||
//------------------------------------------------------------------------------
|
||||
#define RATO_ROOM (VHH_PARA_SCALE + VHH_PARA_SCALE_WIDTH)
|
||||
#define RATO_ROOM_WIDTH 3
|
||||
#define RATO_ROOM_CRC (RATO_ROOM_WIDTH - 1)
|
||||
//------------------------------------------------------------------------------
|
||||
// for ATypeFlowRate.h
|
||||
#define P0_0_RH (RATO_ROOM + RATO_ROOM_WIDTH)
|
||||
#define P0_0_RH_WIDTH 3
|
||||
#define P0_0_RH_CRC (P0_0_RH_WIDTH - 1)
|
||||
|
||||
#define P0_50_RH (P0_0_RH + P0_0_RH_WIDTH)
|
||||
#define P0_50_RH_WIDTH 3
|
||||
#define P0_50_RH_CRC (P0_0_RH_WIDTH - 1)
|
||||
|
||||
#define RH_0 (P0_50_RH + P0_50_RH_WIDTH)
|
||||
#define RH_0_WIDTH 3
|
||||
#define RH_0_CRC (RH_0_WIDTH - 1)
|
||||
|
||||
#define RH_50 (RH_0 + RH_0_WIDTH)
|
||||
#define RH_50_WIDTH 3
|
||||
#define RH_50_CRC (RH_0_WIDTH - 1)
|
||||
//------------------------------------------------------------------------------
|
||||
// for AdjustOffset.h
|
||||
#define ATYPE_WIPER (RH_50 + RH_50_WIDTH)
|
||||
#define ATYPE_WIPER_WIDTH 3
|
||||
#define ATYPE_WIPER_CRC (ATYPE_WIPER_WIDTH - 1)
|
||||
|
||||
#define CTYPE_WIPER (ATYPE_WIPER + ATYPE_WIPER_WIDTH)
|
||||
#define CTYPE_WIPER_WIDTH 3
|
||||
#define CTYPE_WIPER_CRC (CTYPE_WIPER_WIDTH - 1)
|
||||
|
||||
#define ATYPE_RC (CTYPE_WIPER + CTYPE_WIPER_WIDTH)
|
||||
#define ATYPE_RC_WIDTH 3
|
||||
#define ATYPE_RC_CRC (ATYPE_RC_WIDTH - 1)
|
||||
|
||||
#define OFFSET_00 (ATYPE_RC + ATYPE_RC_WIDTH)
|
||||
#define OFFSET_00_WIDTH 3
|
||||
#define OFFSET_00_CRC (OFFSET_00_WIDTH - 1)
|
||||
|
||||
#define OFFSET_50 (OFFSET_00 + OFFSET_00_WIDTH)
|
||||
#define OFFSET_50_WIDTH 3
|
||||
#define OFFSET_50_CRC (OFFSET_50_WIDTH - 1)
|
||||
|
||||
#define MEMS_RATIO (OFFSET_50 + OFFSET_50_WIDTH)
|
||||
#define MEMS_RATIO_WIDTH 3
|
||||
#define MEMS_RATIO_CRC (MEMS_RATIO_WIDTH - 1)
|
||||
//------------------------------------------------------------------------------
|
||||
// for Flowratedetect.h
|
||||
#define OFFSET_AIR_VDUGX (MEMS_RATIO + MEMS_RATIO_WIDTH)
|
||||
#define OFFSET_AIR_VDUGX_WIDTH 3
|
||||
#define OFFSET_AIR_VDUGX_CRC (OFFSET_AIR_VDUGX_WIDTH-1)
|
||||
|
||||
#define OFFSET_GAS_VDUGX (OFFSET_AIR_VDUGX + OFFSET_AIR_VDUGX_WIDTH)
|
||||
#define OFFSET_GAS_VDUGX_WIDTH 3
|
||||
#define OFFSET_GAS_VDUGX_CRC (OFFSET_GAS_VDUGX_WIDTH-1)
|
||||
|
||||
#define OFFSET_GCFX (OFFSET_GAS_VDUGX + OFFSET_GAS_VDUGX_WIDTH)
|
||||
#define OFFSET_GCFX_WIDTH 3
|
||||
#define OFFSET_GCFX_CRC (OFFSET_GCFX_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define FILE_DIFINE_OVER (OFFSET_GCFX + OFFSET_GCFX_WIDTH) // 196
|
||||
|
||||
//******************************************************************************
|
||||
#if(FILE_DIFINE_OVER>0xDB)
|
||||
#pragma message("[Error] Variable Definition Exceeds Limit: > 0xDB")
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define RES_FACTOR 0xDB // 219
|
||||
#define RES_FACTOR_WIDTH 2
|
||||
#define RES_FACTOR_CRC (RES_FACTOR_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define BATTEST_PERIOD 0xDD // 221/ 0xDD
|
||||
#define BATTEST_PERIOD_WIDTH 3
|
||||
#define BATTEST_PERIOD_CRC (BATTEST_PERIOD_WIDTH-1)
|
||||
//------------------------------------------------------------------------------
|
||||
// System setup
|
||||
#define SYS_LCD 0xE0 // 224
|
||||
#define SYS_LCD_WIDTH 2
|
||||
#define SYS_LCD_CRC (SYS_LCD_WIDTH-1)
|
||||
|
||||
#define SYS_LOOP_CHIP (SYS_LCD+SYS_LCD_WIDTH) // 226
|
||||
#define SYS_LOOP_CHIP_WIDTH 2
|
||||
#define SYS_LOOP_CHIP_CRC (SYS_LOOP_CHIP_WIDTH-1)
|
||||
|
||||
#define TEMP_FACTOR (SYS_LOOP_CHIP+SYS_LOOP_CHIP_WIDTH) // 228
|
||||
#define TEMP_FACTOR_WIDTH 2
|
||||
#define TEMP_FACTOR_CRC (TEMP_FACTOR_WIDTH-1)
|
||||
|
||||
#define CALIB_PULSE (TEMP_FACTOR + TEMP_FACTOR_WIDTH) // 230
|
||||
#define CALIB_PULSE_WIDTH 3
|
||||
#define CALIB_PULSE_CRC (CALIB_PULSE_WIDTH-1)
|
||||
//------------------------------------------------------------------------------
|
||||
#define TIMING_TXD_START (CALIB_PULSE + CALIB_PULSE_WIDTH) // 233
|
||||
#define TIMING_TXD_START_WIDTH 3
|
||||
#define TIMING_TXD_START_CRC (TIMING_TXD_START_WIDTH-1)
|
||||
|
||||
#define TIMING_TXD_LEN (TIMING_TXD_START + TIMING_TXD_START_WIDTH) // 236
|
||||
#define TIMING_TXD_LEN_WIDTH 2
|
||||
#define TIMING_TXD_LEN_CRC (TIMING_TXD_LEN_WIDTH-1)
|
||||
|
||||
#define TIMING_TXD_TIME (TIMING_TXD_LEN + TIMING_TXD_LEN_WIDTH) // 238
|
||||
#define TIMING_TXD_TIME_WIDTH 3
|
||||
#define TIMING_TXD_TIME_CRC (TIMING_TXD_TIME_WIDTH-1)
|
||||
|
||||
#define KEY_PASSWORD (TIMING_TXD_TIME + TIMING_TXD_TIME_WIDTH) // 241
|
||||
#define KEY_PASSWORD_WIDTH 5
|
||||
#define KEY_PASSWORD_CRC (KEY_PASSWORD_WIDTH-1)
|
||||
//------------------------------------------------------------------------------
|
||||
#define RESPONSE_TIME (KEY_PASSWORD + KEY_PASSWORD_WIDTH) // 246
|
||||
#define RESPONSE_TIME_WIDTH 2
|
||||
#define RESPONSE_TIME_CRC (RESPONSE_TIME_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define MIN_FLOW (RESPONSE_TIME + RESPONSE_TIME_WIDTH) // 248
|
||||
#define MIN_FLOW_WIDTH 5
|
||||
#define MIN_FLOW_CRC (MIN_FLOW_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define SD24_GAIN (MIN_FLOW + MIN_FLOW_WIDTH) // 253
|
||||
#define SD24_GAIN_WIDTH 2
|
||||
#define SD24_GAIN_CRC (SD24_GAIN_WIDTH-1)
|
||||
|
||||
//******************************************************************************
|
||||
#define PARAMETER_END_0X0000 (SD24_GAIN + SD24_GAIN_WIDTH + 1) // 0x100
|
||||
#define SAVE_PARA_MAX 4 // (page = 64byte, 4*64=0x100)
|
||||
|
||||
//******************************************************************************
|
||||
// 0x0100 ACC define
|
||||
#define PARAMETER_BASE_0X0100 0x0100
|
||||
#if(PARAMETER_END_0X0000>PARAMETER_BASE_0X0100)
|
||||
#pragma message("[Error] Variable Definition Exceeds Limit: > 0x0100")
|
||||
#endif
|
||||
//******************************************************************************
|
||||
// 0x0200 DCOEF define
|
||||
#define PARAMETER_BASE_0X0200 0x0200
|
||||
#define DCOEF_NUM 0x200 // EEPROM address for the number of intervals for device coefficients
|
||||
#define DCOEF_NUM_WIDTH 2 // 2byte
|
||||
#define DCOEF_NUM_CRC (DCOEF_NUM_WIDTH-1)
|
||||
|
||||
#define DCOEF_UNIT (DCOEF_NUM+DCOEF_NUM_WIDTH)
|
||||
#define DCOEF_UNIT_WIDTH 2
|
||||
#define DCOEF_UNIT_CRC (DCOEF_UNIT_WIDTH-1)
|
||||
|
||||
#define DCOEF_BASE (DCOEF_UNIT+DCOEF_UNIT_WIDTH)
|
||||
#define DCOEF_DATA_WIDTH 6
|
||||
#define DCOEF_WIDTH 7 // DCOEF_WIDTH byte required for each device coefficient data
|
||||
#define DCOEF_CRC (DCOEF_WIDTH-1)
|
||||
#define DCOEF_MAX 20 // the max allowable number of intervals for for device coefficients
|
||||
|
||||
#define DCOEF_NODE_WIDTH 5
|
||||
#define DCOEF_VALUE_WIDTH 3
|
||||
|
||||
//******************************************************************************
|
||||
#define PARAMETER_BASE_0X0300 0x0300
|
||||
|
||||
//******************************************************************************
|
||||
// for modbus map setup
|
||||
#define MAP_SET1 PARAMETER_BASE_0X0300
|
||||
#define MAP_SET_WIDTH 3
|
||||
#define MAP_SET_CRC (MAP_SET_WIDTH-1)
|
||||
#define MAP_SET2 (MAP_SET1 + MAP_SET_WIDTH)
|
||||
#define MAP_SET3 (MAP_SET2 + MAP_SET_WIDTH)
|
||||
#define MAP_SET4 (MAP_SET3 + MAP_SET_WIDTH)
|
||||
#define MAP_SET5 (MAP_SET4 + MAP_SET_WIDTH)
|
||||
#define MAP_SET6 (MAP_SET5 + MAP_SET_WIDTH)
|
||||
#define MAP_SET7 (MAP_SET6 + MAP_SET_WIDTH)
|
||||
#define MAP_SET8 (MAP_SET7 + MAP_SET_WIDTH)
|
||||
#define MAP_SET9 (MAP_SET8 + MAP_SET_WIDTH)
|
||||
#define MAP_SET10 (MAP_SET9 + MAP_SET_WIDTH)
|
||||
#define MAP_SET11 (MAP_SET10 + MAP_SET_WIDTH)
|
||||
#define MAP_SET12 (MAP_SET11 + MAP_SET_WIDTH)
|
||||
#define MAP_SET13 (MAP_SET12 + MAP_SET_WIDTH)
|
||||
#define MAP_SET14 (MAP_SET13 + MAP_SET_WIDTH)
|
||||
#define MAP_SET15 (MAP_SET14 + MAP_SET_WIDTH)
|
||||
#define MAP_SET16 (MAP_SET15 + MAP_SET_WIDTH)
|
||||
#define MAP_SET17 (MAP_SET16 + MAP_SET_WIDTH)
|
||||
#define MAP_SET18 (MAP_SET17 + MAP_SET_WIDTH)
|
||||
#define MAP_SET19 (MAP_SET18 + MAP_SET_WIDTH)
|
||||
#define MAP_SET20 (MAP_SET19 + MAP_SET_WIDTH)
|
||||
#define MAP_SET21 (MAP_SET20 + MAP_SET_WIDTH)
|
||||
#define MAP_SET22 (MAP_SET21 + MAP_SET_WIDTH)
|
||||
#define MAP_SET23 (MAP_SET22 + MAP_SET_WIDTH)
|
||||
#define MAP_SET24 (MAP_SET23 + MAP_SET_WIDTH)
|
||||
#define MAP_SET25 (MAP_SET24 + MAP_SET_WIDTH)
|
||||
#define MAP_SET26 (MAP_SET25 + MAP_SET_WIDTH)
|
||||
#define MAP_SET27 (MAP_SET26 + MAP_SET_WIDTH)
|
||||
#define MAP_SET28 (MAP_SET27 + MAP_SET_WIDTH)
|
||||
#define MAP_SET29 (MAP_SET28 + MAP_SET_WIDTH)
|
||||
#define MAP_SET30 (MAP_SET29 + MAP_SET_WIDTH)
|
||||
#define MAP_SET31 (MAP_SET30 + MAP_SET_WIDTH)
|
||||
#define MAP_SET32 (MAP_SET31 + MAP_SET_WIDTH)
|
||||
#define MAP_SET33 (MAP_SET32 + MAP_SET_WIDTH)
|
||||
#define MAP_SET34 (MAP_SET33 + MAP_SET_WIDTH)
|
||||
#define MAP_SET35 (MAP_SET34 + MAP_SET_WIDTH)
|
||||
#define MAP_SET36 (MAP_SET35 + MAP_SET_WIDTH)
|
||||
#define MAP_SET37 (MAP_SET36 + MAP_SET_WIDTH)
|
||||
#define MAP_SET38 (MAP_SET37 + MAP_SET_WIDTH)
|
||||
#define MAP_SET39 (MAP_SET38 + MAP_SET_WIDTH)
|
||||
#define MAP_SET40 (MAP_SET39 + MAP_SET_WIDTH)
|
||||
#define MAP_SET41 (MAP_SET40 + MAP_SET_WIDTH)
|
||||
#define MAP_SET42 (MAP_SET41 + MAP_SET_WIDTH)
|
||||
#define MAP_SET43 (MAP_SET42 + MAP_SET_WIDTH)
|
||||
#define MAP_SET44 (MAP_SET43 + MAP_SET_WIDTH)
|
||||
#define MAP_SET45 (MAP_SET44 + MAP_SET_WIDTH)
|
||||
#define MAP_SET46 (MAP_SET45 + MAP_SET_WIDTH)
|
||||
#define MAP_SET47 (MAP_SET46 + MAP_SET_WIDTH)
|
||||
#define MAP_SET48 (MAP_SET47 + MAP_SET_WIDTH)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define ALARM_ACC (MAP_SET1 + (MAP_SET_WIDTH)*48)
|
||||
#define ALARM_ACC_WIDTH 5
|
||||
#define ALARM_ACC_CRC (ALARM_ACC_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define MIN_LEAK_FLOW (ALARM_ACC + ALARM_ACC_WIDTH)
|
||||
#define MIN_LEAK_FLOW_WIDTH 3
|
||||
#define MIN_LEAK_FLOW_CRC (MIN_LEAK_FLOW_WIDTH-1)
|
||||
|
||||
#define MAX_LEAK_FLOW (MIN_LEAK_FLOW + MIN_LEAK_FLOW_WIDTH)
|
||||
#define MAX_LEAK_FLOW_WIDTH 3
|
||||
#define MAX_LEAK_FLOW_CRC (MAX_LEAK_FLOW_WIDTH-1)
|
||||
|
||||
#define LEAK_TIME (MAX_LEAK_FLOW + MAX_LEAK_FLOW_WIDTH)
|
||||
#define LEAK_TIME_WIDTH 3
|
||||
#define LEAK_TIME_CRC (LEAK_TIME_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define DENSITY_FS_PARA (LEAK_TIME + LEAK_TIME_WIDTH)
|
||||
#define DENSITY_FS_PARA_WIDTH 3
|
||||
#define DENSITY_FS_PARA_CRC (DENSITY_FS_PARA_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define LEAK_COUNTER (DENSITY_FS_PARA + DENSITY_FS_PARA_WIDTH)
|
||||
#define LEAK_COUNTER_WIDTH 3
|
||||
#define LEAK_COUNTER_CRC (LEAK_COUNTER_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define SWITCH_FR (LEAK_COUNTER + LEAK_COUNTER_WIDTH) // 88
|
||||
#define SWITCH_FR_WIDTH 5
|
||||
#define SWITCH_FR_CRC (SWITCH_FR_WIDTH-1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define USER_INIT_INDEX (SWITCH_FR + SWITCH_FR_WIDTH)
|
||||
#define USER_INIT_INDEX_WIDTH 3
|
||||
#define USER_INIT_INDEX_CRC (USER_INIT_INDEX_WIDTH-1)
|
||||
|
||||
#define AUTO_OFFSET_CMD (USER_INIT_INDEX + USER_INIT_INDEX_WIDTH)
|
||||
#define AUTO_OFFSET_CMD_WIDTH 2
|
||||
#define AUTO_OFFSET_CMD_CRC (AUTO_OFFSET_CMD_WIDTH - 1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define FLOW_GAIN (AUTO_OFFSET_CMD + AUTO_OFFSET_CMD_WIDTH)
|
||||
#define FLOW_GAIN_WIDTH 3
|
||||
#define FLOW_GAIN_CRC (FLOW_GAIN_WIDTH - 1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define DIVHX_LOW (FLOW_GAIN + FLOW_GAIN_WIDTH)
|
||||
#define DIVHX_LOW_WIDTH 3
|
||||
#define DIVHX_LOW_CRC (DIVHX_LOW_WIDTH - 1)
|
||||
|
||||
#define DIVHX_HIGH (DIVHX_LOW + DIVHX_LOW_WIDTH)
|
||||
#define DIVHX_HIGH_WIDTH 3
|
||||
#define DIVHX_HIGH_CRC (DIVHX_HIGH_WIDTH - 1)
|
||||
|
||||
#define DIVHX_ROOM (DIVHX_HIGH + DIVHX_HIGH_WIDTH)
|
||||
#define DIVHX_ROOM_WIDTH 3
|
||||
#define DIVHX_ROOM_CRC (DIVHX_ROOM_WIDTH - 1)
|
||||
//------------------------------------------------------------------------------
|
||||
#define VDUGX_LOW (DIVHX_ROOM + DIVHX_ROOM_WIDTH)
|
||||
#define VDUGX_LOW_WIDTH 3
|
||||
#define VDUGX_LOW_CRC (VDUGX_LOW_WIDTH - 1)
|
||||
|
||||
#define VDUGX_HIGH (VDUGX_LOW + VDUGX_LOW_WIDTH)
|
||||
#define VDUGX_HIGH_WIDTH 3
|
||||
#define VDUGX_HIGH_CRC (VDUGX_HIGH_WIDTH - 1)
|
||||
|
||||
#define VDUGX_ROOM (VDUGX_HIGH + VDUGX_HIGH_WIDTH)
|
||||
#define VDUGX_ROOM_WIDTH 3
|
||||
#define VDUGX_ROOM_CRC (VDUGX_ROOM_WIDTH - 1)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#define PARAMETER_BASE_0X0400 0x400
|
||||
#define PARAMETER_END_0X0300 (VDUGX_ROOM + VDUGX_ROOM_WIDTH + 1)
|
||||
#if(PARAMETER_END_0X0300>PARAMETER_BASE_0X0400)
|
||||
#pragma message("[Error] Variable Definition Exceeds Limit: > 0x0400")
|
||||
#endif
|
||||
//==============================================================================
|
||||
// 0x400 for flowrate and calib tempreture
|
||||
//******************************************************************************
|
||||
//******************************************************************************
|
||||
#define TACURVE_NUM PARAMETER_BASE_0X0400
|
||||
#define TACURVE_NUM_WIDTH 2
|
||||
#define TACURVE_NUM_CRC (TACURVE_NUM_WIDTH-1)
|
||||
|
||||
#define TACURVE_DATA_BASE (TACURVE_NUM + TACURVE_NUM_WIDTH)
|
||||
#define TACURVE_DATA_WIDTH 5
|
||||
#define TACURVE_DATA_CRC (TACURVE_DATA_WIDTH-1)
|
||||
#define CURVE_DATA_MAX 36
|
||||
//------------------------------------------------------------------------------
|
||||
#define ATYPECURVE_NUM 0x500
|
||||
#define ATYPECURVE_NUM_WIDTH 2 // 2byte
|
||||
#define ATYPECURVE_NUM_CRC (ATYPECURVE_NUM_WIDTH-1) // 2byte
|
||||
|
||||
#define ATYPECURVE_DATA_BASE (ATYPECURVE_NUM+ATYPECURVE_NUM_WIDTH)
|
||||
#define ATYPECURVE_DATA_WIDTH 5
|
||||
#define ATYPECURVE_DATA_CRC (ATYPECURVE_DATA_WIDTH-1)
|
||||
//------------------------------------------------------------------------------
|
||||
// <20><><EFBFBD><EFBFBD>ԭʼ<D4AD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1>棨Ԥ<E6A3A8><D4A4>256<35>ֽڣ<D6BD>
|
||||
#define BASIC_DATA_BASE 0x600
|
||||
#define BASIC_DATA_MAX ANX
|
||||
#define BASIC_DATA_BYTE_MAX (BASIC_DATA_MAX*2)
|
||||
|
||||
//******************************************************************************
|
||||
// calibration data start address
|
||||
//******************************************************************************
|
||||
#define CALI_DATA_ADDR 0x1000 // for EEPROM store calibration data start addr
|
||||
//******************************************************************************
|
||||
|
||||
//==============================================================================
|
||||
// for BootLoader and upgrade programm
|
||||
//==============================================================================
|
||||
// for information flash
|
||||
#define FLASH_INFO_OFFSET 0x1800 // segment D
|
||||
//#define PARA_LEN (UPGRADE_APP_WIDTH+PROTOCOL_WIDTH+BAUD_RATE_WIDTH+SLAVER_ADDR_WIDTH)
|
||||
#define PARA_LEN (UPGRADE_APP_WIDTH+PROTOCOL_WIDTH+SLAVER_ADDR_WIDTH)
|
||||
#endif
|
||||
@@ -15,11 +15,14 @@
|
||||
#include "../user/Main/parameter.h"
|
||||
#include "../user/Main/GlobeTypeDef.h"
|
||||
#include "../user/Main/ConstDefine.h"
|
||||
#include "../user/Main/StorageType.h"
|
||||
#include "../user/Main/MainCore.h"
|
||||
//#include "../user/Main/DP1703_TFS7306_M0_V10_Flange.h"
|
||||
#include "../user/Main/Macro_Flange.h"
|
||||
//#include "../user/Main/StorageType.h"
|
||||
#include "../user/Main/StorageDefine.h"
|
||||
//==============================================================================
|
||||
//#include "../user/Main/DP2201_TFS36200_M0_V10_Header.h"
|
||||
|
||||
#include "../Core/DP2006_VM1000_Header.h"
|
||||
//==============================================================================
|
||||
#include "../user/Main/MainCore.h"
|
||||
//==============================================================================
|
||||
#include "../Compute/UnitConverterDefine.h"
|
||||
#include "../Protocol/UserModbusDefine.h"
|
||||
@@ -35,8 +38,9 @@
|
||||
//#include "../Utility/user_stdio.h"
|
||||
//==============================================================================
|
||||
#include "../MCU/lhl_systemclock.h"
|
||||
#include "../MCU/lhl_gpio.h"
|
||||
#include "../MCU/lhl_gpio.h"
|
||||
#include "../MCU/lhl_adc.h"
|
||||
#include "../MCU/lhl_adc_dma.h"
|
||||
#include "../MCU/lhl_lptimer.h"
|
||||
#include "../MCU/lhl_timer.h"
|
||||
#include "../MCU/lhl_uart.h"
|
||||
@@ -50,10 +54,10 @@
|
||||
#include "../MCU/lhl_exti.h"
|
||||
#include "../MCU/lhl_rtc.h"
|
||||
#include "../MCU/lhl_watchdog.h"
|
||||
#include "../MCU/lhl_systick.h"
|
||||
#include "../MCU/lhl_xlink.h"
|
||||
|
||||
//==============================================================================
|
||||
//#include "../drivers/AD5420.h"
|
||||
//#include "../drivers/ADC10.h"
|
||||
#include "../Device/CAT24c512.h"
|
||||
#include "../Device/MB85RS16.h"
|
||||
#include "../Device/MCP9808.h"
|
||||
@@ -70,9 +74,8 @@
|
||||
//==============================================================================
|
||||
#include "../Compute/SavingData.h"
|
||||
#include "../Compute/AccCompute.h"
|
||||
#include "../Compute/AdjustOffset.h"
|
||||
//#include "../Compute/AdjustOffset.h"
|
||||
//#include "../Compute/ATypeFlowRate.h"
|
||||
#include "../Compute/CheckSystemVoltage.h"
|
||||
#include "../Compute/Correct.h"
|
||||
#include "../Compute/FlowRateCompute.h"
|
||||
#include "../Compute/GasAnalysis.h"
|
||||
@@ -87,80 +90,20 @@
|
||||
#include "../Protocol/ReadWriteDataBycom.h"
|
||||
#include "../Protocol/InternalModbus.h"
|
||||
#include "../Protocol/MODBUS.h"
|
||||
#include "../Protocol/UserModbusMemAdr.h"
|
||||
#include "../Protocol/UserModbus.h"
|
||||
#include "../Protocol/HWI2CProtocol.h"
|
||||
#include "../Protocol/CommProcess.h"
|
||||
#include "../Protocol/AvantGardeProtocol.h"
|
||||
#include "../Protocol/SampProcess.h"
|
||||
//==============================================================================
|
||||
#include "../Core/D9V2VHH_DP1703V10.h"
|
||||
#include "../Core/FS5001_H2.h"
|
||||
#include "../Core/DP2201V01.h"
|
||||
#include "../Core/D9V2FR_DP2006V1000.h"
|
||||
#include "../Core/DP2201_V5000_IO.h"
|
||||
#include "../Core/DP2201_V5000_Compute.h"
|
||||
#include "../Core/DP2201_V5000_Parameter.h"
|
||||
|
||||
#include "../Core/DP2006_VM1000.h"
|
||||
#include "../Core/DP2006_VM1000_Parameter.h"
|
||||
//==============================================================================
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
////EEPROM <20><>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>
|
||||
//#define EEP_WITDH1 3
|
||||
//#define EEP_8000_BASE 0x00
|
||||
//#define EEP_8001 EEP_8000_BASE+EEP_WITDH1
|
||||
//#define EEP_8002 EEP_8001+EEP_WITDH1
|
||||
////.......
|
||||
//#define EEP_8009 EEP_8008+EEP_WITDH1
|
||||
////.......
|
||||
//#define EEP_8082 EEP_8081+EEP_WITDH1
|
||||
////.......
|
||||
|
||||
//#define EEP_WITDH2 5
|
||||
//#define EEP_8100_BASE 0x100
|
||||
//#define EEP_8101 EEP_8100_BASE+EEP_WITDH2
|
||||
//#define EEP_8102 EEP_8101+EEP_WITDH2
|
||||
////.......
|
||||
|
||||
////C<>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>
|
||||
//u16 mge[125];
|
||||
//#define INT_8000 0
|
||||
////......
|
||||
//#define INT_8009 9
|
||||
////......
|
||||
////Ĭ<><C4AC>ֵ
|
||||
|
||||
////......
|
||||
|
||||
////<2F>û<EFBFBD><C3BB>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
////<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>
|
||||
//#define baseNUM mge[INT_8009] //<2F><><EFBFBD><EFBFBD>baseNUM
|
||||
//#define BASE_NUM_ADR EEP_8009 //<2F><><EFBFBD><EFBFBD>baseNUM<55><4D>ַ
|
||||
//#define BASE_NUM_WITDH EEP_WITDH1 //<2F><><EFBFBD><EFBFBD>baseNUM<55>ֽڿ<D6BD><DABF><EFBFBD>
|
||||
//#define BASE_NUM_MAX 8900
|
||||
//#define BASE_NUM_MIN 900
|
||||
//#define BASE_NUM_DEFAULT 900
|
||||
|
||||
//#define EEP_8009_MAX BASE_NUM_MAX
|
||||
//#define EEP_8009_MIN BASE_NUM_MIN
|
||||
//#define EEP_8009_DEFAULT BASE_NUM_DEFAULT
|
||||
|
||||
////<2F><><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>
|
||||
//#define baseSTA mge[INT_800A] //<2F><><EFBFBD><EFBFBD>baseSTA
|
||||
//#define BASE_STA_ADR EEP_800A //<2F><><EFBFBD><EFBFBD>baseSTA<54><41>ַ
|
||||
//#define BASE_STA_WITDH EEP_WITDH1 //<2F><><EFBFBD><EFBFBD>baseSTA<54>ֽڿ<D6BD><DABF><EFBFBD>
|
||||
//#define BASE_STA_MAX 5
|
||||
//#define BASE_STA_MIN 1
|
||||
//#define BASE_STA_DEFAULT 1
|
||||
|
||||
//#define EEP_800A_MAX BASE_STA_MAX
|
||||
//#define EEP_800A_MIN BASE_STA_MIN
|
||||
//#define EEP_800A_DEFAULT BASE_STA_DEFAULT
|
||||
|
||||
|
||||
////<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD>漰<EFBFBD>ײ<EFBFBD>)
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> baseNUM = ReadParameterFromEEPROM(BASE_NUM_ADR,BASE_NUM_WITDH,BASE_NUM_DEFAULT)
|
||||
//ʵ<>ʲ<EFBFBD><CAB2><EFBFBD><EFBFBD><EFBFBD>ַ = 8009-EEP_8000_BASE
|
||||
//д<><D0B4><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ8009 <20><>ֵ1000
|
||||
//ֻ֪<D6BB><D6AA>λ<EFBFBD>ú<C3BA>λ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD>Ϣ WriteParameterToEEPROM(8009-EEP_8000_BASE,1000,EEP_8009_MAX,EEP_8009_MIN);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -2,9 +2,9 @@
|
||||
#define __parameter_h__
|
||||
|
||||
//******************************************************************************
|
||||
#include "GlobeTypeDef.h"
|
||||
#include "ConstDefine.h"
|
||||
#include "StorageType.h"
|
||||
//#include "GlobeTypeDef.h"
|
||||
//#include "ConstDefine.h"
|
||||
//#include "StorageType.h"
|
||||
//******************************************************************************
|
||||
//Display Language
|
||||
#define CHINESE 0
|
||||
@@ -12,6 +12,7 @@
|
||||
#define CHN_ENG 2
|
||||
#define LANGUAGE CHN_ENG
|
||||
#define LANGUAGE_MAX ENGLISH
|
||||
#define LANGUAGE_MIN CHINESE
|
||||
//------------------------------------------------------------------------------
|
||||
//<2F><>Ӧʱ<D3A6>䶨<EFBFBD><E4B6A8>
|
||||
#define RESP_125MS 0
|
||||
@@ -23,12 +24,12 @@
|
||||
#define RESP_MAX 6
|
||||
|
||||
#define TIMING_BASE 125 // 125MS
|
||||
#define BASE_125MS ((2^RESP_125MS) * TIMING_BASE)
|
||||
#define BASE_250MS ((2^RESP_250MS) * TIMING_BASE)
|
||||
#define BASE_500MS ((2^RESP_500MS) * TIMING_BASE)
|
||||
#define BASE_1000MS ((2^RESP_1000MS) * TIMING_BASE)
|
||||
#define BASE_2000MS ((2^RESP_2000MS) * TIMING_BASE)
|
||||
#define BASE_4000MS ((2^RESP_4000MS) * TIMING_BASE)
|
||||
#define BASE_125MS TIMING_BASE
|
||||
#define BASE_250MS (BASE_125MS * 2)
|
||||
#define BASE_500MS (BASE_250MS * 2)
|
||||
#define BASE_1000MS (BASE_500MS * 2)
|
||||
#define BASE_2000MS (BASE_1000MS * 2)
|
||||
#define BASE_4000MS (BASE_2000MS * 2)
|
||||
#define TIMEBASE_MAX BASE_4000MS
|
||||
|
||||
#define TIMING_500mS 64
|
||||
@@ -102,5 +103,7 @@
|
||||
//******************************************************************************
|
||||
#define INSTRUMENT_FACTOR 1
|
||||
#define ERROR_CORRECT 0
|
||||
//******************************************************************************
|
||||
|
||||
//******************************************************************************
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user