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guishenking
2026-03-20 21:16:58 +08:00
parent 286ff98b8e
commit 90c3d919df
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user/MCU/lhl_i2c_slave.c Executable file
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#include "../main/SystemInclude.h"
#ifndef ENABLE_USER_I2C
#pragma message("[undefined] ENABLE_USER_I2C")
#elif(ENABLE_USER_I2C)
DMA_HandleTypeDef DMA_Handle_IIC_Rx,DMA_Handle_IIC_Tx;
//<2F><>ʼ<EFBFBD><CABC>IIC
//i2c_slave_init(100000 , 0x02);
/**------------------------------------------------------------------------
* @brief <20><>ʼ<EFBFBD><CABC> I2C <20>ӻ<EFBFBD>ģʽ
* @param clockSpeed: I2C ʱ<><CAB1><EFBFBD>ٶȣ<D9B6><C8A3><EFBFBD> 100000 <20><>ʾ 100kHz
* @param slaveAddress: <20>ӻ<EFBFBD><D3BB><EFBFBD>ַ<EFBFBD><D6B7>7λ<37><CEBB>
* @note <20><><EFBFBD><EFBFBD> P0.1 Ϊ SCL<43><4C><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ SCL<43><4C><EFBFBD><EFBFBD>P0.2 Ϊ SDA<44><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ SDA<44><41><EFBFBD><EFBFBD>
* <20><>Ϊ<EFBFBD><CEAA>©<EFBFBD><C2A9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> I2C <20>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>жϡ<D0B6>
* @example I2C_Slave_Init(100000, 0x02); // 100kHz, <20>ӻ<EFBFBD><D3BB><EFBFBD>ַ 0x02
**/
void I2C_Slave_Init(u32 clockSpeed ,u16 slaveAddress)
{
GPIO_InitTypeDef GPIO_InitStructure;
I2C_InitTypeDef I2C_InitStructure;
/* 1. <20><><EFBFBD><EFBFBD> I2C GPIO<49><4F><EFBFBD>ö˿<C3B6> */
GPIO_InitStructure.Pin = GPIO_PIN_1;
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_OD; // I2C SCL<43><4C>©<EFBFBD><C2A9><EFBFBD><EFBFBD>
GPIO_InitStructure.Current = GPIO_CURRENT_8mA;
GPIO_InitStructure.Pull = GPIO_NOPULL;
GPIO_InitStructure.SchmittTrigger = ENABLE;
GPIO_InitStructure.Alternate = GPIO0_1_AF_SCL; // AFIO<49><4F><EFBFBD><EFBFBD>
LHL_GPIO_Init(GPIO0, &GPIO_InitStructure); //P0.1 P2.0 -> SCL
GPIO_InitStructure.Pin = GPIO_PIN_2;
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_OD; // I2C SDA<44><41>©<EFBFBD><C2A9><EFBFBD><EFBFBD>
GPIO_InitStructure.Current = GPIO_CURRENT_8mA;
GPIO_InitStructure.Pull = GPIO_NOPULL;
GPIO_InitStructure.SchmittTrigger = ENABLE;
GPIO_InitStructure.Alternate = GPIO0_2_AF_SDA; // AFIO<49><4F><EFBFBD><EFBFBD>
LHL_GPIO_Init(GPIO0, &GPIO_InitStructure); //P0.2 P1.4 -> SDA
/* 2. <20><><EFBFBD><EFBFBD> I2C <20><><EFBFBD><EFBFBD> */
I2C_InitStructure.ClockSpeed = clockSpeed; //100KHz Standard I2C Speed
I2C_InitStructure.DutyCycle = I2C_DutyCycle_2;
I2C_InitStructure.OwnAddress1 = slaveAddress; //Temporary slave device address
I2C_InitStructure.I2CAck = I2C_Ack_Enable;
I2C_InitStructure.AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
LHL_I2C_Init(&I2C_InitStructure);
// LHL_I2C_StretchClockCmd(DISABLE);//<2F>ر<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>չ
LHL_I2C_ITConfig(I2C_IT_EVT|I2C_IT_BUF|I2C_IT_ERR, ENABLE);
NVIC_SetPriority(I2C1_EV_IRQn,0);
NVIC_EnableIRQ(I2C1_EV_IRQn);
}
/*********************************************************************************************************************************************/
/*<2A>ж<EFBFBD> <20><>ʽ*/
/*********************************************************************************************************************************************/
I2C_DATA_TypeDef I2CData;
/**------------------------------------------------------------------------
* @brief I2C1 <20>¼<EFBFBD><C2BC>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<D0B6>ʽ<EFBFBD><CABD>
* @note <20><><EFBFBD><EFBFBD> I2C <20>ӻ<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD>еĸ<D0B5><C4B8><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>ַƥ<D6B7>䡢<EFBFBD><E4A1A2><EFBFBD>ݽ<EFBFBD><DDBD>ա<EFBFBD><D5A1><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>͡<EFBFBD>
* ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6>ʧ<EFBFBD>ܵȡ<DCB5><C8A1><EFBFBD><EFBFBD><EFBFBD> R_W λ<>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <20><>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD> I2CStartWriteProcess, I2CStartReadProcess,
* I2CReceiveProcess, I2CTransmitProcess, I2CResetProcess<73><73><EFBFBD><EFBFBD>
* <20>ú<EFBFBD><C3BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>ʹ<EFBFBD><CAB9> DMA <20><><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>
**/
void I2C1_EV_IRQHandler()
{
__IO uint32_t sta1,sta2;
__IO uint32_t R_W;
sta1 = pI2C->SR1;
sta2 = pI2C->SR2; //<2F><><EFBFBD><EFBFBD>STOPF
R_W = (sta2&I2C_SR2_TRA_Msk)>>I2C_SR2_TRA_Pos; //<2F>жϵ<D0B6>ǰ<EFBFBD>Ƕ<EFBFBD><C7B6><EFBFBD>Master<65><72>Slave<76><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>MasterдSlave<76><65>
if(sta1 & I2C_SR1_ADDR_Msk)//I2C<32><43>ַƥ<D6B7><C6A5>
{
LHL_I2C_ClearFlag(I2C_FLAG_ADDR);
LHL_I2C_ClearFlag(I2C_FLAG_TXE);
if(R_W == MASTER_READ_SLAVE) I2CStartWriteProcess(); //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> <20><>IIC<49>ӻ<EFBFBD><D3BB><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д)<29>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
else I2CStartReadProcess();//<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> <09><>IIC<49><43>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
if(sta1 & I2C_SR1_STOPF_Msk)
{
LHL_I2C_ClearFlag(I2C_FLAG_STOPF);
return;
}
if(sta1 & I2C_SR1_AF_Msk) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>NACK
{
I2CResetProcess(); //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>
LHL_I2C_Cmd(ENABLE);//<2F><><EFBFBD><EFBFBD>IIC<49><43><EFBFBD><EFBFBD>
LHL_I2C_ClearFlag(I2C_FLAG_TXE | I2C_FLAG_RXNE | I2C_FLAG_AF);
LHL_I2C_ClearFlag(I2C_FLAG_PECERR | I2C_FLAG_OVR | I2C_FLAG_BERR);
return;
}
if((sta1 & I2C_SR1_RXNE_Msk) && (R_W==MASTER_WRITE_SLAVE)) //IICд<43><D0B4>
{
LHL_I2C_ClearFlag(I2C_FLAG_RXNE);
I2CData.rxData[I2CData.rxCounter++] = LHL_I2C_ReceiveData();
I2CReceiveProcess();//<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>,׼<><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(һֱ<D2BB>յ<EFBFBD>I2C_SR1_ADDR_Msk<73><6B><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD>ӻ<EFBFBD><D3BB><EFBFBD>)<29><>
return;
}
if((sta1 & I2C_SR1_TXE_Msk) && (R_W==MASTER_READ_SLAVE)) //IIC<49><43><EFBFBD><EFBFBD>(<28><><EFBFBD>ֽ<EFBFBD>)
{
I2CTransmitProcess();//<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>,<2C><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>Ϊÿ3<C3BF>ֽڴ<D6BD><DAB4><EFBFBD>һ<EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB>ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD>ǰһֱ<D2BB>ɷ<EFBFBD>
LHL_I2C_SendData(I2CData.txData[I2CData.txCounter++]);
return;
}
if(sta1 & I2C_SR1_BERR_Msk) { LHL_I2C_ClearFlag(I2C_FLAG_BERR); return;} //clear BERR
__DSB();//make sure intterupt flag cleared
}
//<2F>ж<EFBFBD> <20><><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>========================================================
#define TEST_BUF_LEN 20
uint8_t iic_tx_buf[TEST_BUF_LEN] = {0} ,iic_tx_len ;
uint8_t iic_rx_buf[TEST_BUF_LEN] = {0};
uint16_t iic_tx_cnt = 0;
uint16_t iic_rx_cnt = 0;
void I2C1_EV_IRQHandler2(void)//
{
__IO uint32_t sta1,sta2;
__IO uint32_t R_W;
sta1 = pI2C->SR1;
sta2 = pI2C->SR2; //<2F><><EFBFBD><EFBFBD>STOPF
R_W = (sta2&I2C_SR2_TRA_Msk)>>I2C_SR2_TRA_Pos; //<2F>жϵ<D0B6>ǰ<EFBFBD>Ƕ<EFBFBD><C7B6><EFBFBD>Master<65><72>Slave<76><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>MasterдSlave<76><65>
if(sta1 & I2C_SR1_ADDR_Msk)//I2C address match
{
if(R_W == MASTER_READ_SLAVE)iic_tx_cnt = 0;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ݣ<EFBFBD><DDA3>ӻ<EFBFBD><D3BB><EFBFBD><EFBFBD><EFBFBD>ģʽ
else iic_rx_cnt = 0;//<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3>ӻ<EFBFBD><D3BB><EFBFBD><EFBFBD><EFBFBD>ģʽ
}
if(sta1 & I2C_SR1_STOPF_Msk)
{
pI2C->CR1 |= I2C_CR1_STOP_Msk;
}
if(sta1 & I2C_SR1_AF_Msk)
{
pI2C->CR1 |= I2C_SR1_AF_Msk; //<2F><><EFBFBD><EFBFBD>nack
pI2C->SR1 &= ~I2C_SR1_AF_Msk;
}
if((sta1 & I2C_SR1_RXNE_Msk) && (R_W==0)) // write
{
//<2F><><EFBFBD>յ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
iic_rx_buf[iic_rx_cnt++] = pI2C->DR;
if(iic_rx_cnt==2)IIC_Cmd_Check_Test();
}
if((sta1 & I2C_SR1_TXE_Msk) && (R_W==1)) //trasmitted one byte
{
pI2C->DR = iic_tx_buf[iic_tx_cnt++];
}
__DSB();//make sure intterupt flag cleared
}
void IIC_Cmd_Check_Test(void)
{
u16 regcmd = (I2CData.rxData[0]<<8) + I2CData.rxData[1];
u8 i;
switch(regcmd)
{
case 0x821A:
iic_tx_buf[0] = 0x00;
iic_tx_buf[1] = 0x01;
iic_tx_buf[2] = I2CWordCrc(iic_tx_buf[0], iic_tx_buf[1]);
iic_tx_len=3;
break;
case 0x30:
iic_tx_buf[0] = 0x30;
iic_tx_buf[1] = 0x31;
iic_tx_buf[2] = I2CWordCrc(iic_tx_buf[0], iic_tx_buf[1]);
iic_tx_buf[3] = 0x40;
iic_tx_buf[4] = 0x41;
iic_tx_buf[5] = I2CWordCrc(iic_tx_buf[3], iic_tx_buf[4]);
iic_tx_buf[6] = 0x32;
iic_tx_buf[7] = 0x33;
iic_tx_buf[8] = I2CWordCrc(iic_tx_buf[6], iic_tx_buf[7]);
iic_tx_buf[9] = 0x34;
iic_tx_buf[10] = 0x35;
iic_tx_buf[11] = I2CWordCrc(iic_tx_buf[9], iic_tx_buf[10]);
iic_tx_buf[12] = 0x36;
iic_tx_buf[13] = 0x37;
iic_tx_buf[14] = I2CWordCrc(iic_tx_buf[12], iic_tx_buf[13]);
iic_tx_buf[15] = 0x38;
iic_tx_buf[16] = 0x39;
iic_tx_buf[17] = I2CWordCrc(iic_tx_buf[15], iic_tx_buf[16]);
iic_tx_len=18;
break;
case 0x36:
iic_tx_buf[0] = 0x32;
iic_tx_buf[1] = 0x33;
iic_tx_buf[2] = I2CWordCrc(iic_tx_buf[0], iic_tx_buf[1]);
iic_tx_len=3;
break;
case 0x81:
iic_tx_buf[0] = 0x01;
iic_tx_buf[1] = 0x41;
iic_tx_buf[2] = I2CWordCrc(iic_tx_buf[0], iic_tx_buf[1]);
iic_tx_len=3;
break;
case 0x3A:
iic_tx_buf[0] = 0x01;
iic_tx_buf[1] = 0x41;
iic_tx_buf[2] = I2CWordCrc(iic_tx_buf[0], iic_tx_buf[1]);
iic_tx_buf[3] = 0x40;
iic_tx_buf[4] = 0x41;
iic_tx_buf[5] = I2CWordCrc(iic_tx_buf[3], iic_tx_buf[4]);
iic_tx_len=6;
break;
case 0x3C:
iic_tx_buf[0] = 0x01;
iic_tx_buf[1] = 0x41;
iic_tx_buf[2] = I2CWordCrc(iic_tx_buf[0], iic_tx_buf[1]);
iic_tx_buf[3] = 0x40;
iic_tx_buf[4] = 0x41;
iic_tx_buf[5] = I2CWordCrc(iic_tx_buf[3], iic_tx_buf[4]);
iic_tx_buf[6] = 0x32;
iic_tx_buf[7] = 0x33;
iic_tx_buf[8] = I2CWordCrc(iic_tx_buf[6], iic_tx_buf[7]);
iic_tx_len=9;
break;
case 0x56:
iic_tx_buf[0] = 0x01;
iic_tx_buf[1] = 0x41;
iic_tx_buf[2] = I2CWordCrc(iic_tx_buf[0], iic_tx_buf[1]);
iic_tx_len=12;
break;
case 0x85:
iic_tx_buf[0] = 0x01;
iic_tx_buf[1] = 0x41;
iic_tx_buf[2] = I2CWordCrc(iic_tx_buf[0], iic_tx_buf[1]);
iic_tx_buf[3] = 0x40;
iic_tx_buf[4] = 0x41;
iic_tx_buf[5] = I2CWordCrc(iic_tx_buf[3], iic_tx_buf[4]);
iic_tx_len=6;
break;
default:
iic_tx_buf[0] = 0x30;
iic_tx_buf[1] = 0x31;
iic_tx_buf[2] = I2CWordCrc(iic_tx_buf[0], iic_tx_buf[1]);
iic_tx_len=3;
break;
}
}
void IIC_Cmd_Check_Test1(void)
{
I2CData.readAddr = (I2CData.rxData[0]<<8) + I2CData.rxData[1];
MBBuf.StartAddr = I2CData.readAddr;
MBBuf.ByteNumber = 2 ; //һ<>ζ<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
MBBuf.RxPointer = &I2CData.rxData[2]; // <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>2<EFBFBD><32>ʼ<EFBFBD>ţ<EFBFBD>0<EFBFBD><30>1<EFBFBD><31><EFBFBD>ڴ洢<DAB4><E6B4A2><EFBFBD>յ<EFBFBD><D5B5>ĵ<EFBFBD>ַ
MBBuf.Index = 0;
// ModBusReadMultiByte();//<2F><><EFBFBD><EFBFBD>MBBuf.StartAddr<64>õ<EFBFBD><C3B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// I2CData.rxData[2] = tempL.Word[0];
// I2CData.rxData[3] = tempL.Word[1];
// <20><>ȡ<EFBFBD><C8A1><EFBFBD>ݸ<EFBFBD><DDB8><EFBFBD>
u8 count = 1;
switch(MBBuf.StartAddr) {
case 0x30: count = 6; break;
case 0x3A: count = 2; break;
case 0x3C: count = 3; break;
case 0x56: count = 4; break;
case 0x85: count = 2; break;
case 0xAE: count = 2; break;
default : count = 1;
}
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ
// UserReadDataProtocol();
u16 index = MBBuf.StartAddr - 0x30;//STD_REG_START
u16 data ;
u8 i , tx_idx = 0;
if(MBBuf.StartAddr > 0x30 && MBBuf.StartAddr <0x130)
{
for( i = 0; i < count; i++)
{
data = MBReg[index + i];
I2CData.txData[tx_idx++] = (data >> 8) & 0xFF;
I2CData.txData[tx_idx++] = data & 0xFF;
I2CData.txData[tx_idx++] = I2CWordCrc((data >> 8) & 0xFF, data & 0xFF);
}
}
else
{
I2CData.txData[tx_idx++] =0x00;
I2CData.txData[tx_idx++] =0x01;
I2CData.txData[tx_idx++] = I2CWordCrc(0x00, 0x01);
}
iic_tx_len = tx_idx;
}
//<2F>ж<EFBFBD> <20><><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD> end========================================================
/*********************************************************************************************************************************************/
/*DMA <20><>ʽ*/
/*********************************************************************************************************************************************/
/**------------------------------------------------------------------------
* @brief <20><>ʼ<EFBFBD><CABC> I2C <20>ӻ<EFBFBD><D3BB><EFBFBD><EFBFBD>յ<EFBFBD> DMA ͨ<><CDA8><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>0<EFBFBD><30>
* @note <20><><EFBFBD><EFBFBD> DMAMUX <20><> I2C0_RX <20><><EFBFBD><EFBFBD>ӳ<EFBFBD>䵽 DMA ͨ<><CDA8>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD> DMA Ϊֱ<CEAA><D6B1>ģʽ<C4A3><CABD>
* Ӳ<><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>赽<EFBFBD>ڴ桢<DAB4><E6A1A2><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD>1<EFBFBD>ֽڡ<D6BD>ѭ<EFBFBD><D1AD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>ʹ<EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϡ<D0B6>
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD> I2CData.rxData <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @example DMA_I2C_SlaveRx_Init();
**/
void DMA_I2C_SlaveRx_Init(void)
{
DMAMUX_InitTypeDef DMAMUX_InitStructure;
/* <20><><EFBFBD><EFBFBD>DMAUX <20><><EFBFBD><EFBFBD>Դ RX<52><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMAͨ<41><CDA8>0 */
DMAMUX_InitStructure.DMA_Channel = DMA_CHANNEL_0; // <20><><EFBFBD><EFBFBD>DMA0<41><30><EFBFBD><EFBFBD>Դ
DMAMUX_InitStructure.Request_Source = REQUEST_SOURCE_I2C0_RX; // <20><><EFBFBD><EFBFBD>ԴI2C0_RX
DMAMUX_InitStructure.Periodic_Trigger = DISABLE; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD>
DMAMUX_InitStructure.Cmd = ENABLE; // ʹ<><CAB9>
LHL_DMAMUX_Init(&DMAMUX_InitStructure);
/* <20><><EFBFBD><EFBFBD>DMAͨ<41><CDA8>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>I2C RX<52><58><EFBFBD>ݰ<EFBFBD><DDB0>˵<EFBFBD><CBB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
DMA_Handle_IIC_Rx.Channel = DMA_CHANNEL_0; // DMACH0
DMA_Handle_IIC_Rx.Mode = DMA_DIRECT_MODE; // ֱ<><D6B1>ģʽ
DMA_Handle_IIC_Rx.Request = DMA_HARDWARE_REQUEST; // Ӳ<><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DMA_Handle_IIC_Rx.Init.Direction = DMA_PERIPH_TO_MEMORY; // <20><><EFBFBD><EFBFBD>-><3E>ڴ<EFBFBD>
DMA_Handle_IIC_Rx.Init.Src_Address = (uint32_t)(&pI2C->DR); // Դ<><D4B4>I2C DR<44>Ĵ<EFBFBD><C4B4><EFBFBD>
DMA_Handle_IIC_Rx.Init.Dest_Address = (uint32_t)&I2CData.rxData; // Ŀ<>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DMA_Handle_IIC_Rx.Init.Data_Width = DMA_DATA_WIDTH_1B; // <20><><EFBFBD>ݿ<EFBFBD><DDBF>ȵ<EFBFBD><C8B5>ڼĴ<DABC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DMA_Handle_IIC_Rx.Init.Data_Size = 1; // ÿ<>ζ<EFBFBD>ȡ1<C8A1><31><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
DMA_Handle_IIC_Rx.Init.Repetition = 2; // <20>ظ<EFBFBD><D8B8><EFBFBD>ȡ <20><>
DMA_Handle_IIC_Rx.Init.Trans_Mode = DMA_CYCLIC_TRANSMISSION; // ѭ<><D1AD>ģʽ
if (LHL_DMA_Init(&DMA_Handle_IIC_Rx) != LHL_OK)
{
while(1); // DMA Init Error
}
LHL_DMA_ITConfig(&DMA_Handle_IIC_Rx, DMA_IT_MAJOR, ENABLE); // <20><><EFBFBD><EFBFBD>DMA0<41><30><EFBFBD>ж<EFBFBD>
NVIC_EnableIRQ(DMA1_CH0_IRQn);
}
/**------------------------------------------------------------------------
* @brief <20><>ʼ<EFBFBD><CABC> I2C <20>ӻ<EFBFBD><D3BB><EFBFBD><EFBFBD>͵<EFBFBD> DMA ͨ<><CDA8><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>1<EFBFBD><31>
* @note <20><><EFBFBD><EFBFBD> DMAMUX <20><> I2C0_TX <20><><EFBFBD><EFBFBD>ӳ<EFBFBD>䵽 DMA ͨ<><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD> DMA Ϊֱ<CEAA><D6B1>ģʽ<C4A3><CABD>
* Ӳ<><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ浽<DAB4><E6B5BD><EFBFBD>衢<EFBFBD><E8A1A2><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD>1<EFBFBD>ֽڡ<D6BD><DAA1><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD>䳤<EFBFBD><E4B3A4><EFBFBD><EFBFBD> iic_tx_len
* ȫ<>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϡ<D0B6><CFA1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1> I2CData.txData <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @example DMA_I2C_SlaveTx_Init();
**/
void DMA_I2C_SlaveTx_Init(void)
{
DMAMUX_InitTypeDef DMAMUX_InitStructure;
/* <20><><EFBFBD><EFBFBD>DMAUX <20><><EFBFBD><EFBFBD>Դ TX<54><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMAͨ<41><CDA8>1 */
DMAMUX_InitStructure.DMA_Channel = DMA_CHANNEL_1; // <20><><EFBFBD><EFBFBD>DMA1<41><31><EFBFBD><EFBFBD>Դ
DMAMUX_InitStructure.Request_Source = REQUEST_SOURCE_I2C0_TX; // <20><><EFBFBD><EFBFBD>ԴI2C0_TX
DMAMUX_InitStructure.Periodic_Trigger = DISABLE;
DMAMUX_InitStructure.Cmd = ENABLE;
LHL_DMAMUX_Init(&DMAMUX_InitStructure);
/* <20><><EFBFBD><EFBFBD>DMAͨ<41><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>𻺴<EFBFBD><F0BBBAB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0>˵<EFBFBD>I2C TX<54><58><EFBFBD><EFBFBD> */
DMA_Handle_IIC_Tx.Channel = DMA_CHANNEL_1; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪDMA1
DMA_Handle_IIC_Tx.Mode = DMA_DIRECT_MODE;
DMA_Handle_IIC_Tx.Request = DMA_HARDWARE_REQUEST;
DMA_Handle_IIC_Tx.Init.Direction = DMA_MEMORY_TO_PERIPH; // <20>ڴ<EFBFBD>-><3E><><EFBFBD><EFBFBD>
DMA_Handle_IIC_Tx.Init.Src_Address = (uint32_t)&I2CData.txData; // Դ<><D4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DMA_Handle_IIC_Tx.Init.Dest_Address = (uint32_t)(&pI2C->DR); // Ŀ<>ģ<EFBFBD>I2C DR<44>Ĵ<EFBFBD><C4B4><EFBFBD>
DMA_Handle_IIC_Tx.Init.Data_Width = DMA_DATA_WIDTH_1B;
DMA_Handle_IIC_Tx.Init.Data_Size = 1;
DMA_Handle_IIC_Tx.Init.Repetition = iic_tx_len;
DMA_Handle_IIC_Tx.Init.Trans_Mode = DMA_SINGLE_TRANSMISSION; // <20><><EFBFBD><EFBFBD>ģʽ DMA_SINGLE_TRANSMISSION DMA_INTERVAL_TRANSMISSION
if (LHL_DMA_Init(&DMA_Handle_IIC_Tx) != LHL_OK)
{
while(1); // DMA Init Error
}
LHL_DMA_ITConfig(&DMA_Handle_IIC_Tx, DMA_IT_MAJOR, ENABLE); // <20><><EFBFBD><EFBFBD>DMA1<41><31><EFBFBD>ж<EFBFBD>
NVIC_EnableIRQ(DMA1_CH1_IRQn);
}
/**------------------------------------------------------------------------
* @brief <20><><EFBFBD><EFBFBD> I2C <20>ӻ<EFBFBD> DMA <20><><EFBFBD><EFBFBD>ģʽ
* @param clockSpeed: I2C ʱ<><CAB1><EFBFBD>ٶ<EFBFBD>
* @param slaveAddress: <20>ӻ<EFBFBD><D3BB><EFBFBD>ַ
* @note <20><>ʼ<EFBFBD><CABC> I2C <20>ӻ<EFBFBD><D3BB><EFBFBD>ʹ<EFBFBD><CAB9> I2C DMA <20><><EFBFBD>󣬳<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵij<DDB5><C4B3><EFBFBD><EFBFBD><EFBFBD>
* @example StartDMA_I2C_Slave_RX(100000, 0x02);
**/
void StartDMA_I2C_Slave_RX(u32 clockSpeed ,u16 slaveAddress)
{
I2C_Slave_Init(clockSpeed,slaveAddress);
LHL_I2C_DMACmd(ENABLE);//DMA<4D><41><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
DMA_I2C_SlaveRx_Init();
LHL_DMA_Start(&DMA_Handle_IIC_Rx);
}
/**------------------------------------------------------------------------
* @brief I2C1 <20>¼<EFBFBD><C2BC>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA <20><>ʽ<EFBFBD><CABD>
* @note <20>ð汾<C3B0><E6B1BE><EFBFBD><EFBFBD> DMA ʹ<>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƥ<D6B7><C6A5><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӻ<EFBFBD><D3BB><EFBFBD>R_W=1<><31>ʱ<EFBFBD><CAB1>
* ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD><EFBFBD>³<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>ӻ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڴ˴<DAB4><CBB4><EFBFBD><EFBFBD><EFBFBD>
* <20><><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD>ǰΪ<C7B0>գ<EFBFBD><D5A3><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6>ʧ<EFBFBD>ܡ<EFBFBD>
* @example <20><><EFBFBD><EFBFBD> DMA ģʽ<C4A3>µ<EFBFBD> I2C <20>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD>
**/
void I2C1_EV_IRQHandler3()//
{
__IO uint32_t sta1,sta2;
uint32_t R_W;
uint8_t data;
sta1 = pI2C->SR1;
sta2 = pI2C->SR2;
R_W = (sta2 & I2C_SR2_TRA_Msk)>>I2C_SR2_TRA_Pos; //write frame or read frame
if(sta1 & I2C_SR1_ADDR_Msk) //I2C address match
{
if (R_W == 1)
{
LHL_DMA_Stop(&DMA_Handle_IIC_Tx);
DMA_I2C_SlaveTx_Init();
LHL_DMA_Start(&DMA_Handle_IIC_Tx);
}
if (R_W == 0)
{
}
}
if(sta1 & I2C_SR1_STOPF_Msk)
{
pI2C->CR1 |= I2C_CR1_STOP_Msk;
}
if(sta1 & I2C_SR1_AF_Msk)
{
pI2C->CR1 |= I2C_SR1_AF_Msk; //<2F><><EFBFBD><EFBFBD>nack
}
if(sta1 & I2C_SR1_AF_Msk)
{
pI2C->SR1 &= ~I2C_SR1_AF_Msk;
}
__DSB(); //make sure intterupt flag cleared
}
#endif