128 lines
4.3 KiB
C
Executable File
128 lines
4.3 KiB
C
Executable File
/******************************************************************************
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* 版权所有：苏州领慧立芯科技有限公司
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* Copyright (c) 2020-2025 Suzhou Legendsemi Technology Co., Ltd.
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******************************************************************************
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* All rights reserved. Distributed under MIT license.
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* The file is encoded in UTF-8 without signature.
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* @file lh32m0g30x_xlink.h
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* @version 2025-09-15
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******************************************************************************/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __LH32M0G3x_XLINK_H
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#define __LH32M0G3x_XLINK_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "lh32m0xx_lhl.h"
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/* Defines -------------------------------------------------------------------*/
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typedef enum
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{
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XLINK0_INPUT_VSS = 0x00u, /*!< Cross Link 0 输入源 */
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XLINK0_INPUT_VDD,
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XLINK0_INPUT_XB_IN0,
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XLINK0_INPUT_XB_IN1,
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XLINK0_INPUT_XB_IN2,
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XLINK0_INPUT_XB_IN3,
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XLINK0_INPUT_TIM1_TRGO,
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XLINK0_INPUT_TIM1_INT,
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XLINK0_INPUT_TIM2_TRGO,
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XLINK0_INPUT_TIM2_INT,
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XLINK0_INPUT_ADC0_CNV_DONE,
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XLINK0_INPUT_ADC1_CNV_DONE,
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XLINK0_INPUT_LPTIM1_INT = 0x10u,
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XLINK0_INPUT_LPTIM2_INT,
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XLINK0_INPUT_BTIM1_TRIGGER,
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XLINK0_INPUT_BTIM2_TRIGGER,
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XLINK0_INPUT_RTC_ALARM,
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XLINK0_INPUT_FAULT,
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XLINK0_INPUT_SOFT_SYNC,
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XLINK0_INPUT_PMU,
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XLINK0_INPUT_ADC_SYNC,
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XLINK0_INPUT_LU_OUT0 = 0x19u,
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XLINK0_INPUT_LU_OUT1,
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} XLINK0_INPUT_SOURCE_t;
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typedef enum
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{
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XLINK1_OUTPUT_LU_OUT0 = 0x18u,
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XLINK1_OUTPUT_LU_OUT1 = 0x1Cu,
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} XLINK1_LU_OUT_t;
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typedef enum
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{
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XLINK1_INPUT_TIM1_TRGO = 0x00u, /*!< Cross Link 1 输入源 */
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XLINK1_INPUT_TIM1_INT,
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XLINK1_INPUT_TIM2_TRGO,
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XLINK1_INPUT_TIM2_INT,
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XLINK1_INPUT_ADC0_CNV_DONE,
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XLINK1_INPUT_ADC1_CNV_DONE,
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XLINK1_INPUT_XB_IN0,
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XLINK1_INPUT_XB_IN1,
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XLINK1_INPUT_XB_IN2,
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XLINK1_INPUT_XB_IN3,
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XLINK1_INPUT_LPTIM1_INT = 0x0Eu,
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XLINK1_INPUT_LPTIM2_INT,
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XLINK1_INPUT_BTIM1_TRIGGER,
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XLINK1_INPUT_BTIM2_TRIGGER,
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XLINK1_INPUT_RTC_ALARM,
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XLINK1_INPUT_FAULT,
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XLINK1_INPUT_SOFT_SYNC,
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XLINK1_INPUT_PMU,
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XLINK1_INPUT_ADC_SYNC,
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} XLINK1_INPUT_SOURCE_t;
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typedef enum
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{
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XLINK0_OUTPUT_ED0 = 0x0000U, /*!< Cross Link 0 输出端口，低8位寄存器偏移地址，高8位位偏移地址 */
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XLINK0_OUTPUT_ED1 = 0x0800U,
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XLINK0_OUTPUT_ED2 = 0x1000U,
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XLINK0_OUTPUT_ED3 = 0x1800U,
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XLINK0_OUTPUT_XB_OUT0 = 0x0004U,
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XLINK0_OUTPUT_XB_OUT1 = 0x0804U,
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XLINK0_OUTPUT_XB_OUT2 = 0x1004U,
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XLINK0_OUTPUT_XB_OUT3 = 0x1804U,
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XLINK0_OUTPUT_ADC0_TRIG = 0x0008U,
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XLINK0_OUTPUT_ADC1_TRIG = 0x0808U,
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XLINK0_OUTPUT_DAC_SYNC = 0x1008U,
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XLINK0_OUTPUT_TIM1_ITR0 = 0x1808U,
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XLINK0_OUTPUT_TIM2_ITR0 = 0x000CU,
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XLINK0_OUTPUT_MIO_TRIGGER_IN0 = 0x080CU,
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XLINK0_OUTPUT_MIO_TRIGGER_IN1 = 0x100CU,
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XLINK0_OUTPUT_LPTIM1_CL = 0x180CU,
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XLINK0_OUTPUT_LPTIM2_CL = 0x0010U,
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} XLINK0_OUTPUT_PORT_t;
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/**
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* @brief Cross Link Initialization Structure definition
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*/
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typedef struct
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{
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XLINK0_INPUT_SOURCE_t XLink_0_Input; /*!< Specifies the Cross Link 0 Input Source*/
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XLINK1_INPUT_SOURCE_t XLink_1_Input; /* Reserved */
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XLINK0_OUTPUT_PORT_t XLink_0_Output; /*!< Specifies the Cross Link 0 Output (Trigger for Example) */
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uint32_t Logic_Unit; /* Reserved */
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uint32_t Edge_Detection; /* Reserved */
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} XLINK_InitTypeDef;
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/* Declaration ---------------------------------------------------------------*/
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void LHL_XLINK_Init(XLINK_InitTypeDef* XLink_Init);
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void LHL_XLINK_InvertSingal(XLINK1_INPUT_SOURCE_t Input, XLINK1_LU_OUT_t Output);
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#ifdef __cplusplus
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}
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#endif
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#endif
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/*********************************End of File**********************************/
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